From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Christian Borntraeger <borntraeger@de.ibm.com>
Subject: Re: [Qemu-devel] TCG problem with cpu_{st,ld}x_data ?
Date: Tue, 26 Jul 2016 07:46:09 +1000 [thread overview]
Message-ID: <1469483169.5978.57.camel@kernel.crashing.org> (raw)
In-Reply-To: <8a2d56b8-d328-bfd0-bdb1-f65fd4f479e2@twiddle.net>
On Mon, 2016-07-25 at 19:42 +0530, Richard Henderson wrote:
> For some targets, we also restore part of the flags computation with this
> mechanism. With more trickery, ARM is (intending to?) compute exception
> syndrome information with this. As I understand it, this is very much akin to
> the PPC gen_set_access_type, so perhaps in future there's some savings to be
> had there
Indeed. Another issue we have is generating the opcode bits in DSISR.
Now thankfully for most modern CPUs this is no longer done in HW but at
the moment, I dont like how we call cpu_ldl_code() in powerpc_excp.
Cheers,
Ben.
prev parent reply other threads:[~2016-07-25 21:46 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-24 12:42 [Qemu-devel] TCG problem with cpu_{st,ld}x_data ? Benjamin Herrenschmidt
2016-07-24 12:51 ` Benjamin Herrenschmidt
2016-07-24 12:52 ` Benjamin Herrenschmidt
2016-07-25 0:36 ` Richard Henderson
2016-07-25 0:46 ` Benjamin Herrenschmidt
2016-07-25 0:51 ` Benjamin Herrenschmidt
2016-07-25 14:00 ` Richard Henderson
2016-07-25 21:42 ` Benjamin Herrenschmidt
2016-07-25 22:19 ` Peter Maydell
2016-07-25 22:42 ` Benjamin Herrenschmidt
2016-07-25 23:22 ` Benjamin Herrenschmidt
2016-07-25 0:34 ` Richard Henderson
2016-07-25 5:15 ` Benjamin Herrenschmidt
2016-07-25 14:12 ` Richard Henderson
2016-07-25 21:46 ` Benjamin Herrenschmidt [this message]
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