From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53028) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS113-0003d5-3P for qemu-devel@nongnu.org; Tue, 26 Jul 2016 07:59:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bS10z-0006nY-0m for qemu-devel@nongnu.org; Tue, 26 Jul 2016 07:59:16 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:57817) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS10y-0006nJ-NJ for qemu-devel@nongnu.org; Tue, 26 Jul 2016 07:59:12 -0400 Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u6QBrc71006132 for ; Tue, 26 Jul 2016 07:59:12 -0400 Received: from e28smtp09.in.ibm.com (e28smtp09.in.ibm.com [125.16.236.9]) by mx0a-001b2d01.pphosted.com with ESMTP id 24dsrnb6et-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 26 Jul 2016 07:59:11 -0400 Received: from localhost by e28smtp09.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 26 Jul 2016 17:29:08 +0530 From: Nikunj A Dadhania Date: Tue, 26 Jul 2016 17:28:25 +0530 In-Reply-To: <1469534318-5549-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1469534318-5549-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1469534318-5549-3-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v4 02/15] target-ppc: Introduce POWER ISA 3.0 flag List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com This flag will be used for POWER9 instructions. Signed-off-by: Nikunj A Dadhania Reviewed-by: David Gibson --- target-ppc/cpu.h | 5 ++++- target-ppc/translate_init.c | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 5fce1ff..c499315 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -2094,6 +2094,8 @@ enum { PPC2_TM = 0x0000000000020000ULL, /* Server PM instructgions (ISA 2.06, Book III) */ PPC2_PM_ISA206 = 0x0000000000040000ULL, + /* POWER ISA 3.0 */ + PPC2_ISA300 = 0x0000000000080000ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \ @@ -2101,7 +2103,8 @@ enum { PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \ PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \ PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \ - PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206) + PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \ + PPC2_ISA300) }; /*****************************************************************************/ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 1e12d80..0d8cff1 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8820,7 +8820,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_PM_ISA206; + PPC2_TM | PPC2_PM_ISA206 | PPC2_ISA300; pcc->msr_mask = (1ull << MSR_SF) | (1ull << MSR_TM) | (1ull << MSR_VR) | -- 2.7.4