From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53165) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS118-0003iK-4O for qemu-devel@nongnu.org; Tue, 26 Jul 2016 07:59:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bS115-0006uC-UY for qemu-devel@nongnu.org; Tue, 26 Jul 2016 07:59:22 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:12945) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS115-0006sv-ML for qemu-devel@nongnu.org; Tue, 26 Jul 2016 07:59:19 -0400 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u6QBrb7G027838 for ; Tue, 26 Jul 2016 07:59:19 -0400 Received: from e28smtp07.in.ibm.com (e28smtp07.in.ibm.com [125.16.236.7]) by mx0a-001b2d01.pphosted.com with ESMTP id 24e27c4sk2-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 26 Jul 2016 07:59:18 -0400 Received: from localhost by e28smtp07.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 26 Jul 2016 17:29:14 +0530 From: Nikunj A Dadhania Date: Tue, 26 Jul 2016 17:28:31 +0530 In-Reply-To: <1469534318-5549-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1469534318-5549-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1469534318-5549-9-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v4 08/15] target-ppc: implement branch-less divd[o][.] List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com Similar to divw, implement branch-less divd. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 48 ++++++++++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 22 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 69d9ae0..ba22e13 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1122,37 +1122,41 @@ GEN_DIVE(divweo, divwe, 1); static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int sign, int compute_ov) { - TCGLabel *l1 = gen_new_label(); - TCGLabel *l2 = gen_new_label(); + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_temp_new_i64(); + TCGv_i64 t3 = tcg_temp_new_i64(); - tcg_gen_brcondi_i64(TCG_COND_EQ, arg2, 0, l1); - if (sign) { - TCGLabel *l3 = gen_new_label(); - tcg_gen_brcondi_i64(TCG_COND_NE, arg2, -1, l3); - tcg_gen_brcondi_i64(TCG_COND_EQ, arg1, INT64_MIN, l1); - gen_set_label(l3); - tcg_gen_div_i64(ret, arg1, arg2); - } else { - tcg_gen_divu_i64(ret, arg1, arg2); - } - if (compute_ov) { - tcg_gen_movi_tl(cpu_ov, 0); - } - tcg_gen_br(l2); - gen_set_label(l1); + tcg_gen_mov_i64(t0, arg1); + tcg_gen_mov_i64(t1, arg2); if (sign) { - tcg_gen_sari_i64(ret, arg1, 63); + tcg_gen_setcondi_i64(TCG_COND_EQ, t2, t0, INT64_MIN); + tcg_gen_setcondi_i64(TCG_COND_EQ, t3, t1, -1); + tcg_gen_and_i64(t2, t2, t3); + tcg_gen_setcondi_i64(TCG_COND_EQ, t3, t1, 0); + tcg_gen_or_i64(t2, t2, t3); + tcg_gen_movi_i64(t3, 0); + tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); + tcg_gen_div_i64(ret, t0, t1); } else { - tcg_gen_movi_i64(ret, 0); + tcg_gen_setcondi_i64(TCG_COND_EQ, t2, t1, 0); + tcg_gen_movi_i64(t3, 0); + tcg_gen_movcond_i64(TCG_COND_NE, t1, t2, t3, t2, t1); + tcg_gen_divu_i64(ret, t0, t1); } if (compute_ov) { - tcg_gen_movi_tl(cpu_ov, 1); - tcg_gen_movi_tl(cpu_so, 1); + tcg_gen_mov_tl(cpu_ov, t2); + tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov); } - gen_set_label(l2); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); + tcg_temp_free_i64(t3); + if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, ret); } + #define GEN_INT_ARITH_DIVD(name, opc3, sign, compute_ov) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ -- 2.7.4