From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59259) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS80s-0006hK-QV for qemu-devel@nongnu.org; Tue, 26 Jul 2016 15:27:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bS80p-0002id-Ih for qemu-devel@nongnu.org; Tue, 26 Jul 2016 15:27:34 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:15281 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS80p-0002iX-Ch for qemu-devel@nongnu.org; Tue, 26 Jul 2016 15:27:31 -0400 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u6QJOLIA096114 for ; Tue, 26 Jul 2016 15:27:31 -0400 Received: from e23smtp05.au.ibm.com (e23smtp05.au.ibm.com [202.81.31.147]) by mx0b-001b2d01.pphosted.com with ESMTP id 24e5wc71p6-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 26 Jul 2016 15:27:30 -0400 Received: from localhost by e23smtp05.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 27 Jul 2016 05:27:28 +1000 From: Nikunj A Dadhania Date: Wed, 27 Jul 2016 00:56:56 +0530 In-Reply-To: <1469561218-3067-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1469561218-3067-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1469561218-3067-5-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH RFC v0 4/6] target-ppc: add vslv instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, benh@kernel.crashing.org, Vivek Andrew Sha From: Vivek Andrew Sha vslv: Vector Shift Left Variable Signed-off-by: Vivek Andrew Sha Signed-off-by: Nikunj A Dadhania --- target-ppc/helper.h | 1 + target-ppc/int_helper.c | 14 ++++++++++++++ target-ppc/translate.c | 2 ++ 3 files changed, 17 insertions(+) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index e93b84b..9703f85 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -211,6 +211,7 @@ DEF_HELPER_3(vslw, void, avr, avr, avr) DEF_HELPER_3(vsld, void, avr, avr, avr) DEF_HELPER_3(vslo, void, avr, avr, avr) DEF_HELPER_3(vsro, void, avr, avr, avr) +DEF_HELPER_3(vslv, void, avr, avr, avr) DEF_HELPER_3(vaddcuw, void, avr, avr, avr) DEF_HELPER_3(vsubcuw, void, avr, avr, avr) DEF_HELPER_2(lvsl, void, avr, tl) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index bffe8d6..412398f 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -1708,6 +1708,20 @@ VSL(w, u32, 0x1F) VSL(d, u64, 0x3F) #undef VSL +void helper_vslv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int i; + unsigned int shift, bytes, size; + + size = ARRAY_SIZE(r->u8); + for (i = 0; i < size; i++) { + shift = b->u8[i] & 0x7; /* extract shift value */ + bytes = (a->u8[i] << 8) + /* extract adjacent bytes */ + (((i + 1) < size) ? a->u8[i + 1] : 0); + r->u8[i] = (bytes << shift) >> 8; /* shift and store result */ + } +} + void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) { int sh = shift & 0xf; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 7cf0c8e..473f21a 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7457,6 +7457,7 @@ GEN_VXFORM(vsraw, 2, 14); GEN_VXFORM(vsrad, 2, 15); GEN_VXFORM(vslo, 6, 16); GEN_VXFORM(vsro, 6, 17); +GEN_VXFORM(vslv, 2, 29); GEN_VXFORM(vaddcuw, 0, 6); GEN_VXFORM(vsubcuw, 0, 22); GEN_VXFORM_ENV(vaddubs, 0, 8); @@ -10942,6 +10943,7 @@ GEN_VXFORM(vsraw, 2, 14), GEN_VXFORM_207(vsrad, 2, 15), GEN_VXFORM(vslo, 6, 16), GEN_VXFORM(vsro, 6, 17), +GEN_VXFORM(vslv, 2, 29), GEN_VXFORM(vaddcuw, 0, 6), GEN_VXFORM(vsubcuw, 0, 22), GEN_VXFORM(vaddubs, 0, 8), -- 2.7.4