From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45523) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSGZD-0000Dy-Lo for qemu-devel@nongnu.org; Wed, 27 Jul 2016 00:35:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bSGZA-00071w-8J for qemu-devel@nongnu.org; Wed, 27 Jul 2016 00:35:35 -0400 Message-ID: <1469594124.5978.121.camel@kernel.crashing.org> From: Benjamin Herrenschmidt Date: Wed, 27 Jul 2016 14:35:24 +1000 In-Reply-To: <20160727021939.GU17429@voom.fritz.box> References: <1469571686-7284-1-git-send-email-benh@kernel.crashing.org> <1469571686-7284-16-git-send-email-benh@kernel.crashing.org> <20160727021939.GU17429@voom.fritz.box> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 16/32] ppc: Rework NIP updates vs. exception generation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On Wed, 2016-07-27 at 12:19 +1000, David Gibson wrote: > twi etc will generally resume from the next instruction if they trap, > yes?=C2=A0 In which case I'm a bit confused by the nip - 4.=C2=A0 But p= ossibly I > just haven't correctly followed all the nip update logic changed by > this patch. >>From the ISA (Program Check interrupt) Trap A Trap type Program interrupt is generated when any of the conditions specified in a Trap instruction is met. The following registers are set: SRR0 For all Program interrupts except a Float- ing-Point Enabled Exception type Program interrupt, set to the effective address of the instruction that caused the corresponding exception. Cheers, Ben.