From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au,
Benjamin Herrenschmidt <benh@kernel.crashing.org>
Subject: [Qemu-devel] [PATCHv2 10/31] ppc: Don't update the NIP in floating point generated code
Date: Wed, 27 Jul 2016 16:56:28 +1000 [thread overview]
Message-ID: <1469602609-31349-10-git-send-email-benh@kernel.crashing.org> (raw)
In-Reply-To: <1469602609-31349-1-git-send-email-benh@kernel.crashing.org>
This is no longer necessary as the helpers will properly retrieve
the return address.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
target-ppc/translate/fp-impl.c | 28 ----------------------------
target-ppc/translate/vsx-impl.c | 6 ------
2 files changed, 34 deletions(-)
diff --git a/target-ppc/translate/fp-impl.c b/target-ppc/translate/fp-impl.c
index 2abc386..9ba9289 100644
--- a/target-ppc/translate/fp-impl.c
+++ b/target-ppc/translate/fp-impl.c
@@ -38,8 +38,6 @@ static void gen_f##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- /* NIP cannot be restored if the memory exception comes from an helper */ \
- gen_update_nip(ctx, ctx->nip - 4); \
gen_reset_fpstatus(); \
gen_helper_f##op(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rA(ctx->opcode)], \
@@ -67,8 +65,6 @@ static void gen_f##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- /* NIP cannot be restored if the memory exception comes from an helper */ \
- gen_update_nip(ctx, ctx->nip - 4); \
gen_reset_fpstatus(); \
gen_helper_f##op(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rA(ctx->opcode)], \
@@ -95,8 +91,6 @@ static void gen_f##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- /* NIP cannot be restored if the memory exception comes from an helper */ \
- gen_update_nip(ctx, ctx->nip - 4); \
gen_reset_fpstatus(); \
gen_helper_f##op(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rA(ctx->opcode)], \
@@ -123,8 +117,6 @@ static void gen_f##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- /* NIP cannot be restored if the memory exception comes from an helper */ \
- gen_update_nip(ctx, ctx->nip - 4); \
gen_reset_fpstatus(); \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
@@ -143,8 +135,6 @@ static void gen_f##name(DisasContext *ctx) \
gen_exception(ctx, POWERPC_EXCP_FPU); \
return; \
} \
- /* NIP cannot be restored if the memory exception comes from an helper */ \
- gen_update_nip(ctx, ctx->nip - 4); \
gen_reset_fpstatus(); \
gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \
cpu_fpr[rB(ctx->opcode)]); \
@@ -179,8 +169,6 @@ static void gen_frsqrtes(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_FPU);
return;
}
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
gen_reset_fpstatus();
gen_helper_frsqrte(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rB(ctx->opcode)]);
@@ -205,8 +193,6 @@ static void gen_fsqrt(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_FPU);
return;
}
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
gen_reset_fpstatus();
gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rB(ctx->opcode)]);
@@ -222,8 +208,6 @@ static void gen_fsqrts(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_FPU);
return;
}
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
gen_reset_fpstatus();
gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env,
cpu_fpr[rB(ctx->opcode)]);
@@ -313,8 +297,6 @@ static void gen_fcmpo(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_FPU);
return;
}
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
gen_reset_fpstatus();
crf = tcg_const_i32(crfD(ctx->opcode));
gen_helper_fcmpo(cpu_env, cpu_fpr[rA(ctx->opcode)],
@@ -331,8 +313,6 @@ static void gen_fcmpu(DisasContext *ctx)
gen_exception(ctx, POWERPC_EXCP_FPU);
return;
}
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
gen_reset_fpstatus();
crf = tcg_const_i32(crfD(ctx->opcode));
gen_helper_fcmpu(cpu_env, cpu_fpr[rA(ctx->opcode)],
@@ -502,8 +482,6 @@ static void gen_mtfsb0(DisasContext *ctx)
gen_reset_fpstatus();
if (likely(crb != FPSCR_FEX && crb != FPSCR_VX)) {
TCGv_i32 t0;
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_const_i32(crb);
gen_helper_fpscr_clrbit(cpu_env, t0);
tcg_temp_free_i32(t0);
@@ -528,8 +506,6 @@ static void gen_mtfsb1(DisasContext *ctx)
/* XXX: we pretend we can only do IEEE floating-point computations */
if (likely(crb != FPSCR_FEX && crb != FPSCR_VX && crb != FPSCR_NI)) {
TCGv_i32 t0;
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_const_i32(crb);
gen_helper_fpscr_setbit(cpu_env, t0);
tcg_temp_free_i32(t0);
@@ -559,8 +535,6 @@ static void gen_mtfsf(DisasContext *ctx)
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL);
return;
}
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
gen_reset_fpstatus();
if (l) {
t0 = tcg_const_i32((ctx->insns_flags2 & PPC2_ISA205) ? 0xffff : 0xff);
@@ -595,8 +569,6 @@ static void gen_mtfsfi(DisasContext *ctx)
return;
}
sh = (8 * w) + 7 - bf;
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
gen_reset_fpstatus();
t0 = tcg_const_i64(((uint64_t)FPIMM(ctx->opcode)) << (4 * sh));
t1 = tcg_const_i32(1 << sh);
diff --git a/target-ppc/translate/vsx-impl.c b/target-ppc/translate/vsx-impl.c
index 7361c47..9f77b06 100644
--- a/target-ppc/translate/vsx-impl.c
+++ b/target-ppc/translate/vsx-impl.c
@@ -380,8 +380,6 @@ static void gen_##name(DisasContext * ctx) \
gen_exception(ctx, POWERPC_EXCP_VSXU); \
return; \
} \
- /* NIP cannot be restored if the memory exception comes from an helper */ \
- gen_update_nip(ctx, ctx->nip - 4); \
opc = tcg_const_i32(ctx->opcode); \
gen_helper_##name(cpu_env, opc); \
tcg_temp_free_i32(opc); \
@@ -394,10 +392,6 @@ static void gen_##name(DisasContext * ctx) \
gen_exception(ctx, POWERPC_EXCP_VSXU); \
return; \
} \
- /* NIP cannot be restored if the exception comes */ \
- /* from a helper. */ \
- gen_update_nip(ctx, ctx->nip - 4); \
- \
gen_helper_##name(cpu_vsrh(xT(ctx->opcode)), cpu_env, \
cpu_vsrh(xB(ctx->opcode))); \
}
--
2.7.4
next prev parent reply other threads:[~2016-07-27 6:59 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-27 6:56 [Qemu-devel] [PATCHv2 01/31] ppc: Provide basic raise_exception_* functions Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 02/31] ppc: Move classic fp ops out of translate.c Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 03/31] ppc: Move embedded spe " Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 04/31] ppc: Move DFP " Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 05/31] ppc: Move VMX " Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 06/31] ppc: Move VSX " Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 07/31] ppc: Rename fload_invalid_op_excp to float_invalid_op_excp Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 08/31] ppc: Make float_invalid_op_excp() pass the return address Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 09/31] ppc: Make float_check_status() " Benjamin Herrenschmidt
2016-07-27 6:56 ` Benjamin Herrenschmidt [this message]
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 11/31] ppc: FP exceptions are always precise Benjamin Herrenschmidt
2016-07-27 7:21 ` David Gibson
2016-07-27 9:44 ` Benjamin Herrenschmidt
2016-07-28 0:32 ` David Gibson
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 12/31] ppc: Don't update NIP in lswi/lswx/stswi/stswx Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 13/31] ppc: Don't update NIP in lmw/stmw/icbi Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 14/31] ppc: Make tlb_fill() use new exception helper Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 15/31] ppc: Rework NIP updates vs. exception generation Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 16/31] ppc: Fix source NIP on SLB related interrupts Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 17/31] ppc: Don't update NIP in DCR access routines Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 18/31] ppc: Don't update NIP in facility unavailable interrupts Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 19/31] ppc: Don't update NIP BookE 2.06 tlbwe Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 20/31] ppc: Don't update NIP on conditional trap instructions Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 21/31] ppc: Don't update NIP if not taking alignment exceptions Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 22/31] ppc: Don't update NIP in dcbz and lscbx Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 23/31] ppc: Make alignment exceptions suck less Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 24/31] ppc: Handle unconditional (always/never) traps at translation time Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 25/31] ppc: Speed up dcbz Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 26/31] ppc: Fix CFAR updates Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 27/31] ppc: Avoid double translation for lvx/lvxl/stvx/stvxl Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 28/31] ppc: Don't set access_type on all load/stores on hash64 Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 29/31] ppc: Use a helper to generate "LE unsupported" alignment interrupts Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 30/31] ppc: load/store multiple and string insns don't do LE Benjamin Herrenschmidt
2016-07-27 6:56 ` [Qemu-devel] [PATCHv2 31/31] ppc: Speed up load/store multiple Benjamin Herrenschmidt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1469602609-31349-10-git-send-email-benh@kernel.crashing.org \
--to=benh@kernel.crashing.org \
--cc=david@gibson.dropbear.id.au \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).