From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51835) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSf9C-0001h2-5b for qemu-devel@nongnu.org; Thu, 28 Jul 2016 02:50:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bSf96-0007xA-C7 for qemu-devel@nongnu.org; Thu, 28 Jul 2016 02:50:21 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:36326 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSf96-0007wt-6N for qemu-devel@nongnu.org; Thu, 28 Jul 2016 02:50:16 -0400 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u6S6mrwT125562 for ; Thu, 28 Jul 2016 02:50:15 -0400 Received: from e23smtp03.au.ibm.com (e23smtp03.au.ibm.com [202.81.31.145]) by mx0b-001b2d01.pphosted.com with ESMTP id 24eauj58xd-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 28 Jul 2016 02:50:15 -0400 Received: from localhost by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 28 Jul 2016 16:50:12 +1000 From: Nikunj A Dadhania Date: Thu, 28 Jul 2016 12:19:34 +0530 In-Reply-To: <1469688581-30853-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1469688581-30853-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1469688581-30853-2-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v1 1/8] target-ppc: implement branch-less divw[o][.] List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, benh@kernel.crashing.org While implementing modulo instructions figured out that the implementation uses many branches. Change the logic to achieve the branch-less code. Undefined value is set to dividend in case of invalid input. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate.c | 48 +++++++++++++++++++++++------------------------- 1 file changed, 23 insertions(+), 25 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 3dd9a48..2a5ce3f 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -1096,41 +1096,39 @@ static void gen_addpcis(DisasContext *ctx) static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int sign, int compute_ov) { - TCGLabel *l1 = gen_new_label(); - TCGLabel *l2 = gen_new_label(); - TCGv_i32 t0 = tcg_temp_local_new_i32(); - TCGv_i32 t1 = tcg_temp_local_new_i32(); + TCGv_i32 t0 = tcg_temp_new_i32(); + TCGv_i32 t1 = tcg_temp_new_i32(); + TCGv_i32 t2 = tcg_temp_new_i32(); + TCGv_i32 t3 = tcg_temp_new_i32(); tcg_gen_trunc_tl_i32(t0, arg1); tcg_gen_trunc_tl_i32(t1, arg2); - tcg_gen_brcondi_i32(TCG_COND_EQ, t1, 0, l1); - if (sign) { - TCGLabel *l3 = gen_new_label(); - tcg_gen_brcondi_i32(TCG_COND_NE, t1, -1, l3); - tcg_gen_brcondi_i32(TCG_COND_EQ, t0, INT32_MIN, l1); - gen_set_label(l3); - tcg_gen_div_i32(t0, t0, t1); - } else { - tcg_gen_divu_i32(t0, t0, t1); - } - if (compute_ov) { - tcg_gen_movi_tl(cpu_ov, 0); - } - tcg_gen_br(l2); - gen_set_label(l1); if (sign) { - tcg_gen_sari_i32(t0, t0, 31); + tcg_gen_setcondi_i32(TCG_COND_EQ, t2, t0, INT_MIN); + tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, -1); + tcg_gen_and_i32(t2, t2, t3); + tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, 0); + tcg_gen_or_i32(t2, t2, t3); + tcg_gen_movi_i32(t3, 0); + tcg_gen_movcond_i32(TCG_COND_NE, t1, t2, t3, t2, t1); + tcg_gen_div_i32(t3, t0, t1); + tcg_gen_extu_i32_tl(ret, t3); } else { - tcg_gen_movi_i32(t0, 0); + tcg_gen_setcondi_i32(TCG_COND_EQ, t2, t1, 0); + tcg_gen_movi_i32(t3, 0); + tcg_gen_movcond_i32(TCG_COND_NE, t1, t2, t3, t2, t1); + tcg_gen_divu_i32(t3, t0, t1); + tcg_gen_extu_i32_tl(ret, t3); } if (compute_ov) { - tcg_gen_movi_tl(cpu_ov, 1); - tcg_gen_movi_tl(cpu_so, 1); + tcg_gen_extu_i32_tl(cpu_ov, t2); + tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov); } - gen_set_label(l2); - tcg_gen_extu_i32_tl(ret, t0); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); + tcg_temp_free_i32(t2); + tcg_temp_free_i32(t3); + if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx, ret); } -- 2.7.4