From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36147) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUfXs-0006uq-P3 for qemu-devel@nongnu.org; Tue, 02 Aug 2016 15:40:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bUfXq-0003gD-SN for qemu-devel@nongnu.org; Tue, 02 Aug 2016 15:40:07 -0400 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]:34254) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUfXq-0003ft-M4 for qemu-devel@nongnu.org; Tue, 02 Aug 2016 15:40:06 -0400 Received: by mail-wm0-x242.google.com with SMTP id q128so32610784wma.1 for ; Tue, 02 Aug 2016 12:40:06 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Tue, 2 Aug 2016 21:39:31 +0200 Message-Id: <1470166775-3671-22-git-send-email-pbonzini@redhat.com> In-Reply-To: <1470166775-3671-1-git-send-email-pbonzini@redhat.com> References: <1470166775-3671-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 21/25] x86: ioapic: ignore level irq during processing List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Xu From: Peter Xu For level triggered interrupts, we will get Remote IRR bit cleared after guest kernel finished processing specific request. Before that, we should ignore the same interrupt from triggering again. Signed-off-by: Peter Xu Message-Id: <1469974685-4144-1-git-send-email-peterx@redhat.com> [Push new "if" up so that it covers KVM split irqchip as well. - Paolo] Signed-off-by: Paolo Bonzini --- hw/intc/ioapic.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 2d3282a..a00d882 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -117,21 +117,25 @@ static void ioapic_service(IOAPICCommonState *s) s->ioredtbl[i] |= IOAPIC_LVT_REMOTE_IRR; } + if (coalesce) { + /* We are level triggered interrupts, and the + * guest should be still working on previous one, + * so skip it. */ + continue; + } + #ifdef CONFIG_KVM if (kvm_irqchip_is_split()) { if (info.trig_mode == IOAPIC_TRIGGER_EDGE) { kvm_set_irq(kvm_state, i, 1); kvm_set_irq(kvm_state, i, 0); } else { - if (!coalesce) { - kvm_set_irq(kvm_state, i, 1); - } + kvm_set_irq(kvm_state, i, 1); } continue; } -#else - (void)coalesce; #endif + /* No matter whether IR is enabled, we translate * the IOAPIC message into a MSI one, and its * address space will decide whether we need a -- 2.7.4