From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37348) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bXYkr-0007Ex-HS for qemu-devel@nongnu.org; Wed, 10 Aug 2016 15:01:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bXYko-00087N-JV for qemu-devel@nongnu.org; Wed, 10 Aug 2016 15:01:29 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:48679) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bXYko-000876-9z for qemu-devel@nongnu.org; Wed, 10 Aug 2016 15:01:26 -0400 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u7AIxK7e008734 for ; Wed, 10 Aug 2016 15:01:25 -0400 Received: from e28smtp07.in.ibm.com (e28smtp07.in.ibm.com [125.16.236.7]) by mx0a-001b2d01.pphosted.com with ESMTP id 24qm9tc87n-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 10 Aug 2016 15:01:25 -0400 Received: from localhost by e28smtp07.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 11 Aug 2016 00:31:21 +0530 From: Nikunj A Dadhania Date: Thu, 11 Aug 2016 00:30:56 +0530 Message-Id: <1470855666-31696-1-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v1 00/10] POWER9 TCG enablements - part4 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, benh@kernel.crashing.org This series contains 10 new instructions for POWER9 ISA3.0. Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x. Patches: 01: xxspltib: VSX Vector Splat Immediate Byte 02: Use tcg_gen_qemu_ld and write consolidated macro 03: Use tcg_gen_qemu_st and write consolidated macro 04: darn: Deliver A Random Number 05: lxsibzx - Load VSX Scalar as Integer Byte & Zero Indexed lxsihzx - Load VSX Scalar as Integer Halfword & Zero Indexed 06: stxsibx - Store VSX Scalar as Integer Byte Indexed stxsihx - Store VSX Scalar as Integer Halfword Indexed 07: lxvw4x - improve implementation 08: lxvb16x: Load VSX Vector Byte*16 lxvh8x: Load VSX Vector Halfword*8 09: stxv4x - improve implementation 10: stxvb16x: Store VSX Vector Byte*16 stxvh8x: Store VSX Vector Halfword*8 Changelog: v0: * darn - read /dev/random to get the random number * xxspltib - make is PPC64 only * Consolidate load/store operations and use macros to generate qemu_st/ld * Simplify load/store vsx endian manipulation Nikunj A Dadhania (9): target-ppc: add xxspltib instruction target-ppc: consolidate load operations target-ppc: consolidate store operations target-ppc: add lxsi[bw]zx instruction target-ppc: add stxsi[bh]x instruction target-ppc: improve lxvw4x implementation target-ppc: add lxvb16x and lxvh8x target-ppc: improve stxvw4x implementation target-ppc: add stxvb16x and stxvh8x Ravi Bangoria (1): target-ppc: Implement darn instruction target-ppc/helper.h | 4 + target-ppc/int_helper.c | 51 ++++++++++ target-ppc/mem_helper.c | 11 ++ target-ppc/translate.c | 131 ++++++++++++------------ target-ppc/translate/vsx-impl.inc.c | 195 +++++++++++++++++++++++++++++++----- target-ppc/translate/vsx-ops.inc.c | 15 +++ 6 files changed, 318 insertions(+), 89 deletions(-) -- 2.7.4