From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41264) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bYHJF-00030Y-US for qemu-devel@nongnu.org; Fri, 12 Aug 2016 14:36:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bYHJ8-0001kG-UJ for qemu-devel@nongnu.org; Fri, 12 Aug 2016 14:35:57 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:48436 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bYHJ8-0001jy-Oq for qemu-devel@nongnu.org; Fri, 12 Aug 2016 14:35:50 -0400 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u7CIY9GN044304 for ; Fri, 12 Aug 2016 14:35:50 -0400 Received: from e28smtp03.in.ibm.com (e28smtp03.in.ibm.com [125.16.236.3]) by mx0a-001b2d01.pphosted.com with ESMTP id 24rty5e3j8-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 12 Aug 2016 14:35:49 -0400 Received: from localhost by e28smtp03.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Sat, 13 Aug 2016 00:05:45 +0530 From: Nikunj A Dadhania Date: Sat, 13 Aug 2016 00:04:42 +0530 In-Reply-To: <1471026883-27235-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1471026883-27235-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1471026883-27235-17-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v2 16/17] target-ppc: improve stxvw4x implementation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, benh@kernel.crashing.org Manipulate data and store 8bytes instead of 4bytes. Signed-off-by: Nikunj A Dadhania --- target-ppc/translate/vsx-impl.inc.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c index caa6660..f2fc5f9 100644 --- a/target-ppc/translate/vsx-impl.inc.c +++ b/target-ppc/translate/vsx-impl.inc.c @@ -205,7 +205,8 @@ static void gen_stxvd2x(DisasContext *ctx) static void gen_stxvw4x(DisasContext *ctx) { - TCGv_i64 tmp; + TCGv_i64 xsh = cpu_vsrh(xS(ctx->opcode)); + TCGv_i64 xsl = cpu_vsrl(xS(ctx->opcode)); TCGv EA; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); @@ -214,21 +215,19 @@ static void gen_stxvw4x(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); - tmp = tcg_temp_new_i64(); - - tcg_gen_shri_i64(tmp, cpu_vsrh(xS(ctx->opcode)), 32); - gen_qemu_st32_i64(ctx, tmp, EA); - tcg_gen_addi_tl(EA, EA, 4); - gen_qemu_st32_i64(ctx, cpu_vsrh(xS(ctx->opcode)), EA); - - tcg_gen_shri_i64(tmp, cpu_vsrl(xS(ctx->opcode)), 32); - tcg_gen_addi_tl(EA, EA, 4); - gen_qemu_st32_i64(ctx, tmp, EA); - tcg_gen_addi_tl(EA, EA, 4); - gen_qemu_st32_i64(ctx, cpu_vsrl(xS(ctx->opcode)), EA); + if (ctx->le_mode) { + tcg_gen_qemu_st_i64(xsh, EA, ctx->mem_idx, MO_BEQ); + tcg_gen_addi_tl(EA, EA, 8); + tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_BEQ); + } else { + gen_helper_bswap32x2(xsh, xsh); + tcg_gen_qemu_st_i64(xsh, EA, ctx->mem_idx, MO_LEQ); + tcg_gen_addi_tl(EA, EA, 8); + gen_helper_bswap32x2(xsl, xsl); + tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_LEQ); + } tcg_temp_free(EA); - tcg_temp_free_i64(tmp); } #define MV_VSRW(name, tcgop1, tcgop2, target, source) \ -- 2.7.4