* [Qemu-devel] [PATCH] target-arm: Fix lpae bit in FSR on an alignment fault
@ 2016-08-15 17:48 Sergey Sorokin
2016-08-15 18:06 ` Peter Maydell
0 siblings, 1 reply; 2+ messages in thread
From: Sergey Sorokin @ 2016-08-15 17:48 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, qemu-arm, Sergey Sorokin
If an alignment fault occurred and target EL is using AArch32,
then DFSR/IFSR bit LPAE[9] must be set correctly.
Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
---
target-arm/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 3e8588e..be27b21 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
* the LPAE long descriptor format, or the short descriptor format
*/
if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
- env->exception.fsr = 0x21;
+ env->exception.fsr = (1 << 9) | 0x21;
} else {
env->exception.fsr = 0x1;
}
--
1.9.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] target-arm: Fix lpae bit in FSR on an alignment fault
2016-08-15 17:48 [Qemu-devel] [PATCH] target-arm: Fix lpae bit in FSR on an alignment fault Sergey Sorokin
@ 2016-08-15 18:06 ` Peter Maydell
0 siblings, 0 replies; 2+ messages in thread
From: Peter Maydell @ 2016-08-15 18:06 UTC (permalink / raw)
To: Sergey Sorokin; +Cc: QEMU Developers, qemu-arm
On 15 August 2016 at 18:48, Sergey Sorokin <afarallax@yandex.ru> wrote:
> If an alignment fault occurred and target EL is using AArch32,
> then DFSR/IFSR bit LPAE[9] must be set correctly.
>
> Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
> ---
> target-arm/op_helper.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index 3e8588e..be27b21 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
> * the LPAE long descriptor format, or the short descriptor format
> */
> if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) {
> - env->exception.fsr = 0x21;
> + env->exception.fsr = (1 << 9) | 0x21;
> } else {
> env->exception.fsr = 0x1;
> }
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
I've applied this to the set of target-arm patches I'm collecting for 2.8.
thanks
-- PMM
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