From: Michael Rolnik <mrolnik@gmail.com>
To: qemu-devel@nongnu.org
Cc: rth@twiddle.net, peter.maydell@linaro.org,
Michael Rolnik <mrolnik@gmail.com>
Subject: [Qemu-devel] [PATCH v17 5/9] target-avr: adding AVR interrupt handling
Date: Thu, 18 Aug 2016 15:07:46 +0300 [thread overview]
Message-ID: <1471522070-77598-6-git-send-email-mrolnik@gmail.com> (raw)
In-Reply-To: <1471522070-77598-1-git-send-email-mrolnik@gmail.com>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
---
target-avr/helper.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index b48222d..8511fb7 100644
--- a/target-avr/helper.c
+++ b/target-avr/helper.c
@@ -32,11 +32,66 @@
bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
bool ret = false;
+ CPUClass *cc = CPU_GET_CLASS(cs);
+ AVRCPU *cpu = AVR_CPU(cs);
+ CPUAVRState *env = &cpu->env;
+
+ if (interrupt_request & CPU_INTERRUPT_RESET) {
+ if (cpu_interrupts_enabled(env)) {
+ cs->exception_index = EXCP_RESET;
+ cc->do_interrupt(cs);
+
+ cs->interrupt_request &= ~CPU_INTERRUPT_RESET;
+
+ ret = true;
+ }
+ }
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ if (cpu_interrupts_enabled(env) && env->intsrc != 0) {
+ int index = ctz32(env->intsrc);
+ cs->exception_index = EXCP_INT(index);
+ cc->do_interrupt(cs);
+
+ env->intsrc &= env->intsrc - 1; /* clear the interrupt */
+ cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
+
+ ret = true;
+ }
+ }
return ret;
}
void avr_cpu_do_interrupt(CPUState *cs)
{
+ AVRCPU *cpu = AVR_CPU(cs);
+ CPUAVRState *env = &cpu->env;
+
+ uint32_t ret = env->pc_w;
+ int vector = 0;
+ int size = avr_feature(env, AVR_FEATURE_JMP_CALL) ? 2 : 1;
+ int base = 0; /* TODO: where to get it */
+
+ if (cs->exception_index == EXCP_RESET) {
+ vector = 0;
+ } else if (env->intsrc != 0) {
+ vector = ctz32(env->intsrc) + 1;
+ }
+
+ if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
+ cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+ cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
+ cpu_stb_data(env, env->sp--, (ret & 0xff0000) >> 16);
+ } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) {
+ cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+ cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
+ } else {
+ cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+ }
+
+ env->pc_w = base + vector * size;
+ env->sregI = 0; /* clear Global Interrupt Flag */
+
+ cs->exception_index = -1;
}
int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
--
2.4.9 (Apple Git-60)
next prev parent reply other threads:[~2016-08-18 12:08 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-18 12:07 [Qemu-devel] [PATCH v17 0/9] 8bit AVR cores Michael Rolnik
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 1/9] target-avr: AVR cores support is added Michael Rolnik
2016-08-18 18:13 ` Peter Maydell
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 2/9] target-avr: adding AVR CPU features/flavors Michael Rolnik
2016-08-18 18:14 ` Peter Maydell
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 3/9] target-avr: adding a sample AVR board Michael Rolnik
2016-08-18 18:14 ` Peter Maydell
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 4/9] target-avr: adding instructions encodings Michael Rolnik
2016-08-18 12:07 ` Michael Rolnik [this message]
2016-08-18 18:32 ` [Qemu-devel] [PATCH v17 5/9] target-avr: adding AVR interrupt handling Peter Maydell
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 6/9] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions Michael Rolnik
2016-08-18 18:16 ` Peter Maydell
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 7/9] target-avr: adding instruction translation Michael Rolnik
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 8/9] target-avr: instruction decoder generator Michael Rolnik
2016-08-18 12:07 ` [Qemu-devel] [PATCH v17 9/9] target-avr: adding instruction decoder Michael Rolnik
2016-08-18 12:26 ` [Qemu-devel] [PATCH v17 0/9] 8bit AVR cores no-reply
2016-08-18 18:34 ` Peter Maydell
2016-09-05 10:52 ` Michael Rolnik
2016-09-16 6:45 ` Michael Rolnik
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