From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34614) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bcrom-0003NX-AI for qemu-devel@nongnu.org; Thu, 25 Aug 2016 06:23:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bcrog-0001ab-8U for qemu-devel@nongnu.org; Thu, 25 Aug 2016 06:23:27 -0400 Received: from mga03.intel.com ([134.134.136.65]:15072) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bcrog-0001Ur-1t for qemu-devel@nongnu.org; Thu, 25 Aug 2016 06:23:22 -0400 From: Chao Peng Date: Thu, 25 Aug 2016 06:15:02 -0400 Message-Id: <1472120105-29235-10-git-send-email-chao.p.peng@linux.intel.com> In-Reply-To: <1472120105-29235-1-git-send-email-chao.p.peng@linux.intel.com> References: <1472120105-29235-1-git-send-email-chao.p.peng@linux.intel.com> Subject: [Qemu-devel] [RFC PATCH v2 09/12] ich9: enable pm registers when there is no firmware List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , gor Mammedov , Xiao Guangrong , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Haozhong Zhang Signed-off-by: Chao Peng --- hw/isa/lpc_ich9.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index 10d1ee8..28e9911 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -484,6 +484,9 @@ static void ich9_lpc_reset(DeviceState *qdev) { PCIDevice *d = PCI_DEVICE(qdev); ICH9LPCState *lpc = ICH9_LPC_DEVICE(d); + PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); + uint32_t pm_base = ICH9_LPC_PMBASE_DEFAULT; + uint8_t lpc_ctlr = ICH9_LPC_ACPI_CTRL_DEFAULT; uint32_t rcba_old = pci_get_long(d->config + ICH9_LPC_RCBA); int i; @@ -495,9 +498,14 @@ static void ich9_lpc_reset(DeviceState *qdev) pci_set_byte(d->config + ICH9_LPC_PIRQE_ROUT + i, ICH9_LPC_PIRQ_ROUT_DEFAULT); } - pci_set_byte(d->config + ICH9_LPC_ACPI_CTRL, ICH9_LPC_ACPI_CTRL_DEFAULT); - pci_set_long(d->config + ICH9_LPC_PMBASE, ICH9_LPC_PMBASE_DEFAULT); + if (!pcms->fw_cfg) { + lpc_ctlr = ICH9_LPC_ACPI_CTRL_ACPI_EN; + pm_base = 0x600 | ICH9_LPC_PMBASE_RTE; + } + + pci_set_byte(d->config + ICH9_LPC_ACPI_CTRL, lpc_ctlr); + pci_set_long(d->config + ICH9_LPC_PMBASE, pm_base); pci_set_long(d->config + ICH9_LPC_RCBA, ICH9_LPC_RCBA_DEFAULT); ich9_cc_reset(lpc); -- 1.8.3.1