From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34601) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bcroj-0003I4-2h for qemu-devel@nongnu.org; Thu, 25 Aug 2016 06:23:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bcroi-0001bF-9I for qemu-devel@nongnu.org; Thu, 25 Aug 2016 06:23:25 -0400 Received: from mga03.intel.com ([134.134.136.65]:15072) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bcroi-0001Ur-3E for qemu-devel@nongnu.org; Thu, 25 Aug 2016 06:23:24 -0400 From: Chao Peng Date: Thu, 25 Aug 2016 06:15:03 -0400 Message-Id: <1472120105-29235-11-git-send-email-chao.p.peng@linux.intel.com> In-Reply-To: <1472120105-29235-1-git-send-email-chao.p.peng@linux.intel.com> References: <1472120105-29235-1-git-send-email-chao.p.peng@linux.intel.com> Subject: [Qemu-devel] [RFC PATCH v2 10/12] q35: initialize MMCFG base when there is no firmware List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , gor Mammedov , Xiao Guangrong , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Haozhong Zhang Signed-off-by: Chao Peng --- hw/pci-host/q35.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index e33d5a5..c5c5fe2 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -448,9 +448,18 @@ static void mch_reset(DeviceState *qdev) { PCIDevice *d = PCI_DEVICE(qdev); MCHPCIState *mch = MCH_PCI_DEVICE(d); + PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); + uint64_t pciexbar = MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT; - pci_set_quad(d->config + MCH_HOST_BRIDGE_PCIEXBAR, - MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT); + if (!pcms->fw_cfg) { + pciexbar |= MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_256M; + pciexbar |= MCH_HOST_BRIDGE_PCIEXBAREN; + + e820_add_entry(MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT, + MCH_HOST_BRIDGE_PCIEXBAR_MAX, E820_RESERVED); + } + + pci_set_quad(d->config + MCH_HOST_BRIDGE_PCIEXBAR, pciexbar); d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; d->config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT; @@ -516,6 +525,8 @@ static void mch_realize(PCIDevice *d, Error **errp) init_pam(DEVICE(mch), mch->ram_memory, mch->system_memory, mch->pci_address_space, &mch->pam_regions[1], PAM_EXPAN_BASE, 12 * PAM_EXPAN_SIZE); + + mch_reset(DEVICE(mch)); } uint64_t mch_mcfg_base(void) -- 1.8.3.1