From: Chao Peng <chao.p.peng@linux.intel.com>
To: qemu-devel@nongnu.org
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
gor Mammedov <imammedo@redhat.com>,
Xiao Guangrong <guangrong.xiao@linux.intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>,
Haozhong Zhang <haozhong.zhang@intel.com>
Subject: [Qemu-devel] [RFC PATCH v2 02/12] pc: make sata configurable
Date: Thu, 25 Aug 2016 06:14:55 -0400 [thread overview]
Message-ID: <1472120105-29235-3-git-send-email-chao.p.peng@linux.intel.com> (raw)
In-Reply-To: <1472120105-29235-1-git-send-email-chao.p.peng@linux.intel.com>
Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
---
hw/i386/pc.c | 12 +++++++-----
hw/i386/pc_q35.c | 25 +++++++++++++++----------
include/hw/i386/pc.h | 2 ++
3 files changed, 24 insertions(+), 15 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 66e1961..99fb9aa 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -397,13 +397,13 @@ static void pc_cmos_init_late(void *opaque)
int i, trans;
val = 0;
- if (ide_get_geometry(arg->idebus[0], 0,
- &cylinders, &heads, §ors) >= 0) {
+ if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0,
+ &cylinders, &heads, §ors) >= 0) {
cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors);
val |= 0xf0;
}
- if (ide_get_geometry(arg->idebus[0], 1,
- &cylinders, &heads, §ors) >= 0) {
+ if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1,
+ &cylinders, &heads, §ors) >= 0) {
cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors);
val |= 0x0f;
}
@@ -415,7 +415,8 @@ static void pc_cmos_init_late(void *opaque)
geometry. It is always such that: 1 <= sects <= 63, 1
<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
geometry can be different if a translation is done. */
- if (ide_get_geometry(arg->idebus[i / 2], i % 2,
+ if (arg->idebus[i / 2] &&
+ ide_get_geometry(arg->idebus[i / 2], i % 2,
&cylinders, &heads, §ors) >= 0) {
trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1;
assert((trans & ~3) == 0);
@@ -2191,6 +2192,7 @@ static void pc_machine_initfn(Object *obj)
pc_machine_set_nvdimm, &error_abort);
PC_MACHINE_DEFINE_PROP_BOOL(pcms, PC_MACHINE_SMBUS, smbus, true);
+ PC_MACHINE_DEFINE_PROP_BOOL(pcms, PC_MACHINE_SATA, sata, true);
}
static void pc_machine_reset(void)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 5bb19c1..88da970 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -231,16 +231,21 @@ static void pc_q35_init(MachineState *machine)
/* connect pm stuff to lpc */
ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms));
- /* ahci and SATA device, for q35 1 ahci controller is built-in */
- ahci = pci_create_simple_multifunction(host_bus,
- PCI_DEVFN(ICH9_SATA1_DEV,
- ICH9_SATA1_FUNC),
- true, "ich9-ahci");
- idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
- idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
- g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
- ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
- ahci_ide_create_devs(ahci, hd);
+ if (pcms->sata) {
+ /* ahci and SATA device, for q35 1 ahci controller is built-in */
+ ahci = pci_create_simple_multifunction(host_bus,
+ PCI_DEVFN(ICH9_SATA1_DEV,
+ ICH9_SATA1_FUNC),
+ true, "ich9-ahci");
+ idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
+ idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
+ g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
+ ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
+ ahci_ide_create_devs(ahci, hd);
+ } else {
+ idebus[0] = idebus[1] = NULL;
+ }
+
if (machine_usb(machine)) {
/* Should we create 6 UHCI according to ich9 spec? */
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index aec809c..f5be478 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -78,6 +78,7 @@ struct PCMachineState {
AddressSpace *ioapic_as;
bool smbus;
+ bool sata;
};
#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
@@ -87,6 +88,7 @@ struct PCMachineState {
#define PC_MACHINE_SMM "smm"
#define PC_MACHINE_NVDIMM "nvdimm"
#define PC_MACHINE_SMBUS "smbus"
+#define PC_MACHINE_SATA "sata"
/**
* PCMachineClass:
--
1.8.3.1
next prev parent reply other threads:[~2016-08-25 10:23 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-25 10:14 [Qemu-devel] [RFC PATCH v2 00/12] Guest startup time optimization Chao Peng
2016-08-25 10:14 ` [Qemu-devel] [RFC PATCH v2 01/12] pc: make smbus configurable Chao Peng
2016-09-06 20:18 ` Eduardo Habkost
2016-08-25 10:14 ` Chao Peng [this message]
2016-08-25 10:14 ` [Qemu-devel] [RFC PATCH v2 03/12] pc: make pic configurable Chao Peng
2016-08-25 10:14 ` [Qemu-devel] [RFC PATCH v2 04/12] pc: make pit configurable Chao Peng
2016-08-25 10:14 ` [Qemu-devel] [RFC PATCH v2 05/12] acpi: build static _PRT Chao Peng
2016-08-29 17:06 ` Paolo Bonzini
2016-08-25 10:14 ` [Qemu-devel] [RFC PATCH v2 06/12] acpi: expose data structurs and functions of BIOS linker loader Chao Peng
2016-08-25 10:15 ` [Qemu-devel] [RFC PATCH v2 07/12] acpi: expose acpi_checksum() Chao Peng
2016-08-25 10:15 ` [Qemu-devel] [RFC PATCH v2 08/12] acpi: patch guest ACPI when there is no firmware Chao Peng
2016-08-25 10:15 ` [Qemu-devel] [RFC PATCH v2 09/12] ich9: enable pm registers " Chao Peng
2016-08-25 10:15 ` [Qemu-devel] [RFC PATCH v2 10/12] q35: initialize MMCFG base " Chao Peng
2016-08-25 10:15 ` [Qemu-devel] [RFC PATCH v2 11/12] pc: support direct loading protected/long mode kernel Chao Peng
2016-08-25 10:15 ` [Qemu-devel] [RFC PATCH v2 12/12] pc: skip firmware Chao Peng
2016-08-29 17:08 ` Paolo Bonzini
2016-09-02 11:08 ` [Qemu-devel] [RFC PATCH v2 00/12] Guest startup time optimization Paolo Bonzini
2016-09-05 2:37 ` Michael S. Tsirkin
2016-09-06 10:48 ` Chao Peng
2016-09-06 11:53 ` Michael S. Tsirkin
2016-09-06 14:28 ` Chao Peng
2016-09-12 15:15 ` Gerd Hoffmann
2016-09-12 17:57 ` [Qemu-devel] [SeaBIOS] " Peter Stuge
2016-09-06 14:21 ` [Qemu-devel] " Paolo Bonzini
2016-09-06 14:31 ` Chao Peng
2016-09-06 14:45 ` Michael S. Tsirkin
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