From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51377) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bgHjj-0007vM-Q6 for qemu-devel@nongnu.org; Sat, 03 Sep 2016 16:40:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bgHjc-00030I-SG for qemu-devel@nongnu.org; Sat, 03 Sep 2016 16:40:22 -0400 Received: from mail-pa0-x241.google.com ([2607:f8b0:400e:c03::241]:33558) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bgHjc-00030D-Lh for qemu-devel@nongnu.org; Sat, 03 Sep 2016 16:40:16 -0400 Received: by mail-pa0-x241.google.com with SMTP id vy10so7115626pac.0 for ; Sat, 03 Sep 2016 13:40:16 -0700 (PDT) Received: from bigtime.twiddle.net (174-24-157-40.tukw.qwest.net. [174.24.157.40]) by smtp.gmail.com with ESMTPSA id cp11sm23739651pac.28.2016.09.03.13.40.15 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 03 Sep 2016 13:40:15 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sat, 3 Sep 2016 13:39:37 -0700 Message-Id: <1472935202-3342-10-git-send-email-rth@twiddle.net> In-Reply-To: <1472935202-3342-1-git-send-email-rth@twiddle.net> References: <1472935202-3342-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v3 09/34] cputlb: Move probe_write out of softmmu_template.h List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Richard Henderson --- cputlb.c | 21 +++++++++++++++++++++ softmmu_template.h | 23 ----------------------- 2 files changed, 21 insertions(+), 23 deletions(-) diff --git a/cputlb.c b/cputlb.c index cf68211..8a021ab 100644 --- a/cputlb.c +++ b/cputlb.c @@ -527,6 +527,27 @@ static bool victim_tlb_hit(CPUArchState *env, size_t mmu_idx, size_t index, victim_tlb_hit(env, mmu_idx, index, offsetof(CPUTLBEntry, TY), \ (ADDR) & TARGET_PAGE_MASK) +/* Probe for whether the specified guest write access is permitted. + * If it is not permitted then an exception will be taken in the same + * way as if this were a real write access (and we will not return). + * Otherwise the function will return, and there will be a valid + * entry in the TLB for this access. + */ +void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, + uintptr_t retaddr) +{ + int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write; + + if ((addr & TARGET_PAGE_MASK) + != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { + /* TLB entry is for a different page */ + if (!VICTIM_TLB_HIT(addr_write, addr)) { + tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); + } + } +} + #define MMUSUFFIX _mmu #define DATA_SIZE 1 diff --git a/softmmu_template.h b/softmmu_template.h index 3c56df1..6805028 100644 --- a/softmmu_template.h +++ b/softmmu_template.h @@ -484,29 +484,6 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, glue(glue(st, SUFFIX), _be_p)((uint8_t *)haddr, val); } #endif /* DATA_SIZE > 1 */ - -#if DATA_SIZE == 1 -/* Probe for whether the specified guest write access is permitted. - * If it is not permitted then an exception will be taken in the same - * way as if this were a real write access (and we will not return). - * Otherwise the function will return, and there will be a valid - * entry in the TLB for this access. - */ -void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx, - uintptr_t retaddr) -{ - int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write; - - if ((addr & TARGET_PAGE_MASK) - != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { - /* TLB entry is for a different page */ - if (!VICTIM_TLB_HIT(addr_write, addr)) { - tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr); - } - } -} -#endif #endif /* !defined(SOFTMMU_CODE_ACCESS) */ #undef READ_ACCESS_TYPE -- 2.7.4