From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52399) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhk8A-0000Ss-AE for qemu-devel@nongnu.org; Wed, 07 Sep 2016 17:11:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bhk84-0002l5-7t for qemu-devel@nongnu.org; Wed, 07 Sep 2016 17:11:37 -0400 Received: from mail-yb0-x241.google.com ([2607:f8b0:4002:c09::241]:34442) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhk84-0002kt-3P for qemu-devel@nongnu.org; Wed, 07 Sep 2016 17:11:32 -0400 Received: by mail-yb0-x241.google.com with SMTP id g5so646361yba.1 for ; Wed, 07 Sep 2016 14:11:32 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 7 Sep 2016 14:10:39 -0700 Message-Id: <1473282648-23487-10-git-send-email-rth@twiddle.net> In-Reply-To: <1473282648-23487-1-git-send-email-rth@twiddle.net> References: <1473282648-23487-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 09/18] tcg/mips: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Pranith Kumar From: Pranith Kumar Signed-off-by: Pranith Kumar Message-Id: <20160714202026.9727-7-bobby.prani@gmail.com> Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.inc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 8614ff8..a59a311 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -292,6 +292,7 @@ typedef enum { OPC_JALR = OPC_SPECIAL | 0x09, OPC_MOVZ = OPC_SPECIAL | 0x0A, OPC_MOVN = OPC_SPECIAL | 0x0B, + OPC_SYNC = OPC_SPECIAL | 0x0F, OPC_MFHI = OPC_SPECIAL | 0x10, OPC_MFLO = OPC_SPECIAL | 0x12, OPC_MULT = OPC_SPECIAL | 0x18, @@ -1652,6 +1653,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const_args[4], const_args[5], true); break; + case INDEX_op_mb: + tcg_out32(s, OPC_SYNC); + break; case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ case INDEX_op_call: /* Always emitted via tcg_out_call. */ @@ -1732,6 +1736,8 @@ static const TCGTargetOpDef mips_op_defs[] = { { INDEX_op_qemu_ld_i64, { "L", "L", "lZ", "lZ" } }, { INDEX_op_qemu_st_i64, { "SZ", "SZ", "SZ", "SZ" } }, #endif + + { INDEX_op_mb, { } }, { -1 }, }; -- 2.7.4