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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Pranith Kumar <bobby.prani@gmail.com>,
	Stefan Weil <sw@weilnetz.de>
Subject: [Qemu-devel] [PULL 13/18] tcg/tci: Add support for fence
Date: Wed,  7 Sep 2016 14:10:43 -0700	[thread overview]
Message-ID: <1473282648-23487-14-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1473282648-23487-1-git-send-email-rth@twiddle.net>

From: Pranith Kumar <bobby.prani@gmail.com>

Cc: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-Id: <20160714202026.9727-11-bobby.prani@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/tci/tcg-target.inc.c | 3 +++
 tci.c                    | 4 ++++
 2 files changed, 7 insertions(+)

diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c
index 3c47ea7..9dbf4d5 100644
--- a/tcg/tci/tcg-target.inc.c
+++ b/tcg/tci/tcg-target.inc.c
@@ -255,6 +255,7 @@ static const TCGTargetOpDef tcg_target_op_defs[] = {
     { INDEX_op_bswap32_i32, { R, R } },
 #endif
 
+    { INDEX_op_mb, { } },
     { -1 },
 };
 
@@ -800,6 +801,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
         }
         tcg_out_i(s, *args++);
         break;
+    case INDEX_op_mb:
+        break;
     case INDEX_op_mov_i32:  /* Always emitted via tcg_out_mov.  */
     case INDEX_op_mov_i64:
     case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi.  */
diff --git a/tci.c b/tci.c
index b488c0d..4bdc645 100644
--- a/tci.c
+++ b/tci.c
@@ -1236,6 +1236,10 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
                 tcg_abort();
             }
             break;
+        case INDEX_op_mb:
+            /* Ensure ordering for all kinds */
+            smp_mb();
+            break;
         default:
             TODO();
             break;
-- 
2.7.4

  parent reply	other threads:[~2016-09-07 21:11 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-07 21:10 [Qemu-devel] [PULL 00/18] tcg queued patches Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 01/18] tcg: Support arbitrary size + alignment Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 02/18] tcg: Merge GETPC and GETRA Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 03/18] cpu-exec: Check -dfilter for -d cpu Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 04/18] Introduce TCGOpcode for memory barrier Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 05/18] tcg/i386: Add support for fence Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 06/18] tcg/aarch64: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 07/18] tcg/arm: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 08/18] tcg/ia64: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 09/18] tcg/mips: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 10/18] tcg/ppc: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 11/18] tcg/s390: " Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 12/18] tcg/sparc: " Richard Henderson
2016-09-07 21:10 ` Richard Henderson [this message]
2016-09-07 21:10 ` [Qemu-devel] [PULL 14/18] target-arm: Generate fences in ARMv7 frontend Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 15/18] target-alpha: Generate fence op Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 16/18] target-aarch64: Generate fences for aarch64 Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 17/18] target-i386: Generate fences for x86 Richard Henderson
2016-09-07 21:10 ` [Qemu-devel] [PULL 18/18] tcg: Optimize fence instructions Richard Henderson
2016-09-08 17:15 ` [Qemu-devel] [PULL v2 00/18] tcg queued patches Richard Henderson
2016-09-08 20:38   ` Richard Henderson
2016-09-08 23:49     ` Pranith Kumar
2016-09-09  0:06       ` Pranith Kumar
2016-09-09  6:51         ` Richard Henderson
2016-09-12 17:23           ` Richard Henderson

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