From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52471) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhk8F-0000ZE-4D for qemu-devel@nongnu.org; Wed, 07 Sep 2016 17:11:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bhk8E-0002nz-12 for qemu-devel@nongnu.org; Wed, 07 Sep 2016 17:11:43 -0400 Received: from mail-yw0-x242.google.com ([2607:f8b0:4002:c05::242]:33150) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bhk8D-0002nt-Td for qemu-devel@nongnu.org; Wed, 07 Sep 2016 17:11:41 -0400 Received: by mail-yw0-x242.google.com with SMTP id g192so1183318ywh.0 for ; Wed, 07 Sep 2016 14:11:41 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Wed, 7 Sep 2016 14:10:46 -0700 Message-Id: <1473282648-23487-17-git-send-email-rth@twiddle.net> In-Reply-To: <1473282648-23487-1-git-send-email-rth@twiddle.net> References: <1473282648-23487-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 16/18] target-aarch64: Generate fences for aarch64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Pranith Kumar From: Pranith Kumar Signed-off-by: Pranith Kumar Message-Id: <20160714202026.9727-14-bobby.prani@gmail.com> Signed-off-by: Richard Henderson --- target-arm/translate-a64.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index f5e29d2..09877bc 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1305,7 +1305,7 @@ static void handle_sync(DisasContext *s, uint32_t insn, return; case 4: /* DSB */ case 5: /* DMB */ - /* We don't emulate caches so barriers are no-ops */ + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); return; case 6: /* ISB */ /* We need to break the TB after this insn to execute @@ -1934,7 +1934,13 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn) if (!is_store) { s->is_ldex = true; gen_load_exclusive(s, rt, rt2, tcg_addr, size, is_pair); + if (is_lasr) { + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); + } } else { + if (is_lasr) { + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); + } gen_store_exclusive(s, rs, rt, rt2, tcg_addr, size, is_pair); } } else { @@ -1943,11 +1949,17 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn) /* Generate ISS for non-exclusive accesses including LASR. */ if (is_store) { + if (is_lasr) { + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); + } do_gpr_st(s, tcg_rt, tcg_addr, size, true, rt, iss_sf, is_lasr); } else { do_gpr_ld(s, tcg_rt, tcg_addr, size, false, false, true, rt, iss_sf, is_lasr); + if (is_lasr) { + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); + } } } } -- 2.7.4