From: Michael Rolnik <mrolnik@gmail.com>
To: qemu-devel@nongnu.org
Cc: Michael Rolnik <mrolnik@gmail.com>
Subject: [Qemu-devel] [PATCH RFC v1 23/29] target-arc: FLAG, BRK, SLEEP
Date: Fri, 9 Sep 2016 01:32:04 +0300 [thread overview]
Message-ID: <1473373930-31547-24-git-send-email-mrolnik@gmail.com> (raw)
In-Reply-To: <1473373930-31547-1-git-send-email-mrolnik@gmail.com>
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
---
target-arc/helper.h | 1 +
target-arc/op_helper.c | 6 +++++
target-arc/translate-inst.c | 61 +++++++++++++++++++++++++++++++++++++++++++++
target-arc/translate-inst.h | 4 +++
4 files changed, 72 insertions(+)
diff --git a/target-arc/helper.h b/target-arc/helper.h
index 1d84935..14769b1 100644
--- a/target-arc/helper.h
+++ b/target-arc/helper.h
@@ -23,4 +23,5 @@ DEF_HELPER_2(norm, i32, env, i32)
DEF_HELPER_2(normw, i32, env, i32)
DEF_HELPER_2(lr, tl, env, i32)
DEF_HELPER_2(sr, void, i32, i32)
+DEF_HELPER_1(halt, void, env)
diff --git a/target-arc/op_helper.c b/target-arc/op_helper.c
index 3cf9080..b07939c 100644
--- a/target-arc/op_helper.c
+++ b/target-arc/op_helper.c
@@ -411,3 +411,9 @@ target_ulong helper_lr(CPUARCState *env, uint32_t aux)
return result;
}
+void helper_halt(CPUARCState *env)
+{
+ /* TODO: implement */
+}
+
+
diff --git a/target-arc/translate-inst.c b/target-arc/translate-inst.c
index 524b213..9d0f195 100644
--- a/target-arc/translate-inst.c
+++ b/target-arc/translate-inst.c
@@ -2617,3 +2617,64 @@ gen_set_label(label_done);
return BS_NONE;
}
+/*
+ BRK
+*/
+int arc_gen_BRK(DisasCtxt *ctx)
+{
+ tcg_gen_movi_tl(cpu_debug_BH, 1);
+ gen_helper_halt(cpu_env);
+ return BS_BREAK;
+}
+
+/*
+ FLAG
+*/
+int arc_gen_FLAG(DisasCtxt *ctx, TCGv src1)
+{
+ TCGLabel *label_else = gen_new_label();
+ TCGLabel *label_done = gen_new_label();
+ TCGv temp = tcg_temp_new_i32();
+
+ tcg_gen_mov_tl(temp, src1);
+
+ tcg_gen_andi_tl(cpu_Hf, temp, 1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_Hf, 0, label_else);
+
+ gen_helper_halt(cpu_env);
+
+gen_set_label(label_else);
+ tcg_gen_shri_tl(temp, temp, 1);
+ tcg_gen_andi_tl(cpu_E1f, temp, 1);
+
+ tcg_gen_shri_tl(temp, temp, 1);
+ tcg_gen_andi_tl(cpu_E2f, temp, 1);
+
+ tcg_gen_shri_tl(temp, temp, 6);
+ tcg_gen_andi_tl(cpu_Vf, temp, 1);
+
+ tcg_gen_shri_tl(temp, temp, 1);
+ tcg_gen_andi_tl(cpu_Cf, temp, 1);
+
+ tcg_gen_shri_tl(temp, temp, 1);
+ tcg_gen_andi_tl(cpu_Nf, temp, 1);
+
+ tcg_gen_shri_tl(temp, temp, 1);
+ tcg_gen_andi_tl(cpu_Zf, temp, 1);
+gen_set_label(label_done);
+
+ return BS_NONE;
+}
+
+/*
+ SLEEP
+*/
+int arc_gen_SLEEP(DisasCtxt *ctx, TCGv src1)
+{
+ tcg_gen_movi_tl(cpu_debug_ZZ, 1);
+ tcg_gen_andi_tl(cpu_E1f, src1, 0x01);
+ tcg_gen_andi_tl(cpu_E2f, src1, 0x02);
+
+ return BS_BREAK;
+}
+
diff --git a/target-arc/translate-inst.h b/target-arc/translate-inst.h
index e2b76d4..5794cad 100644
--- a/target-arc/translate-inst.h
+++ b/target-arc/translate-inst.h
@@ -159,3 +159,7 @@ int arc_gen_NEGSW(DisasCtxt *c, TCGv dest, TCGv src1);
int arc_gen_ASLS(DisasCtxt *c, TCGv dest, TCGv src1, TCGv src2);
int arc_gen_ASRS(DisasCtxt *ctx, TCGv dest, TCGv src1, TCGv src2);
+int arc_gen_SLEEP(DisasCtxt *c, TCGv src1);
+int arc_gen_BRK(DisasCtxt *c);
+int arc_gen_FLAG(DisasCtxt *c, TCGv src1);
+
--
2.4.9 (Apple Git-60)
next prev parent reply other threads:[~2016-09-08 22:33 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-08 22:31 [Qemu-devel] [PATCH RFC v1 00/29] ARC cores Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 01/29] target-arc: initial commit Michael Rolnik
2016-09-20 23:31 ` Richard Henderson
2016-09-26 1:22 ` Max Filippov
2016-09-27 18:46 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 02/29] target-arc: ADC, ADD, ADD1, ADD2, ADD3 Michael Rolnik
2016-09-20 20:51 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 03/29] target-arc: SUB, SUB1, SUB2, SUB3, SBC, RSUB, CMP Michael Rolnik
2016-09-20 23:32 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 04/29] target-arc: AND, OR, XOR, BIC, TST Michael Rolnik
2016-09-20 23:35 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 05/29] target-arc: ASL(m), ASR(m), LSR(m), ROR(m) Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 06/29] target-arc: EX, LD, ST, SYNC, PREFETCH Michael Rolnik
2016-09-20 23:46 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 07/29] target-arc: MAX, MIN Michael Rolnik
2016-09-20 23:48 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 08/29] target-arc: MOV, EXT, SEX, SWAP Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 09/29] target-arc: NEG, ABS, NOT Michael Rolnik
2016-09-20 23:55 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 10/29] target-arc: POP, PUSH Michael Rolnik
2016-09-20 23:57 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 11/29] target-arc: BCLR, BMSK, BSET, BTST, BXOR Michael Rolnik
2016-09-21 0:07 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 12/29] target-arc: RLC, RRC Michael Rolnik
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 13/29] target-arc: NORM, NORMW Michael Rolnik
2016-09-21 0:14 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 14/29] target-arc: MPY, MPYH, MPYHU, MPYU Michael Rolnik
2016-09-21 0:17 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 15/29] target-arc: MUL64, MULU64, DIVAW Michael Rolnik
2016-09-21 0:20 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 16/29] target-arc: BBIT0, BBIT1, BR Michael Rolnik
2016-09-21 0:25 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 17/29] target-arc: B, BL Michael Rolnik
2016-09-21 0:28 ` Richard Henderson
2016-09-08 22:31 ` [Qemu-devel] [PATCH RFC v1 18/29] target-arc: J, JL Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 19/29] target-arc: LR, SR Michael Rolnik
2016-09-21 0:31 ` Richard Henderson
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 20/29] target-arc: ADDS, ADDSDW, SUBS, SUBSDW Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 21/29] target-arc: ABSS, ABSSW, NEGS, NEGSW, RND16, SAT16 Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 22/29] target-arc: ASLS, ASRS Michael Rolnik
2016-09-21 0:36 ` Richard Henderson
2016-09-08 22:32 ` Michael Rolnik [this message]
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 24/29] target-arc: NOP, UNIMP Michael Rolnik
2016-09-21 0:39 ` Richard Henderson
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 25/29] target-arc: TRAP, SWI Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 26/29] target-arc: RTIE Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 27/29] target-arc: LP Michael Rolnik
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 28/29] target-arc: decode Michael Rolnik
2016-09-21 0:49 ` Richard Henderson
2016-09-08 22:32 ` [Qemu-devel] [PATCH RFC v1 29/29] target-arc: sample board Michael Rolnik
2016-09-16 15:01 ` [Qemu-devel] [PATCH RFC v1 00/29] ARC cores Alexey Brodkin
2016-09-17 18:26 ` Michael Rolnik
2016-09-19 12:40 ` Alexey Brodkin
2016-09-19 12:55 ` Igor Guryanov
2016-09-19 13:45 ` Michael Rolnik
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1473373930-31547-24-git-send-email-mrolnik@gmail.com \
--to=mrolnik@gmail.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).