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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, Pranith Kumar <bobby.prani@gmail.com>,
	Claudio Fontana <claudio.fontana@gmail.com>
Subject: [Qemu-devel] [PULL v5 06/18] tcg/aarch64: Add support for fence
Date: Wed, 14 Sep 2016 09:20:01 -0700	[thread overview]
Message-ID: <1473870013-9545-7-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1473870013-9545-1-git-send-email-rth@twiddle.net>

From: Pranith Kumar <bobby.prani@gmail.com>

Cc: Claudio Fontana <claudio.fontana@gmail.com>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-Id: <20160714202026.9727-4-bobby.prani@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/aarch64/tcg-target.inc.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 2ce2cb5..388cd93 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -372,6 +372,11 @@ typedef enum {
     I3510_EOR       = 0x4a000000,
     I3510_EON       = 0x4a200000,
     I3510_ANDS      = 0x6a000000,
+
+    /* System instructions.  */
+    DMB_ISH         = 0xd50338bf,
+    DMB_LD          = 0x00000100,
+    DMB_ST          = 0x00000200,
 } AArch64Insn;
 
 static inline uint32_t tcg_in32(TCGContext *s)
@@ -981,6 +986,18 @@ static inline void tcg_out_addsub2(TCGContext *s, int ext, TCGReg rl,
     tcg_out_mov(s, ext, orig_rl, rl);
 }
 
+static inline void tcg_out_mb(TCGContext *s, TCGArg a0)
+{
+    static const uint32_t sync[] = {
+        [0 ... TCG_MO_ALL]            = DMB_ISH | DMB_LD | DMB_ST,
+        [TCG_MO_ST_ST]                = DMB_ISH | DMB_ST,
+        [TCG_MO_LD_LD]                = DMB_ISH | DMB_LD,
+        [TCG_MO_LD_ST]                = DMB_ISH | DMB_LD,
+        [TCG_MO_LD_ST | TCG_MO_LD_LD] = DMB_ISH | DMB_LD,
+    };
+    tcg_out32(s, sync[a0 & TCG_MO_ALL]);
+}
+
 #ifdef CONFIG_SOFTMMU
 /* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
  *                                     TCGMemOpIdx oi, uintptr_t ra)
@@ -1649,6 +1666,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
         tcg_out_insn(s, 3508, SMULH, TCG_TYPE_I64, a0, a1, a2);
         break;
 
+    case INDEX_op_mb:
+        tcg_out_mb(s, a0);
+        break;
+
     case INDEX_op_mov_i32:  /* Always emitted via tcg_out_mov.  */
     case INDEX_op_mov_i64:
     case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi.  */
@@ -1773,6 +1794,7 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
     { INDEX_op_muluh_i64, { "r", "r", "r" } },
     { INDEX_op_mulsh_i64, { "r", "r", "r" } },
 
+    { INDEX_op_mb, { } },
     { -1 },
 };
 
-- 
2.7.4

  parent reply	other threads:[~2016-09-14 16:21 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-14 16:19 [Qemu-devel] [PULL v5 00/18] tcg queued patches Richard Henderson
2016-09-14 16:19 ` [Qemu-devel] [PULL v5 01/18] tcg: Support arbitrary size + alignment Richard Henderson
2016-09-14 16:19 ` [Qemu-devel] [PULL v5 02/18] tcg: Merge GETPC and GETRA Richard Henderson
2016-09-14 16:19 ` [Qemu-devel] [PULL v5 03/18] cpu-exec: Check -dfilter for -d cpu Richard Henderson
2016-09-14 16:19 ` [Qemu-devel] [PULL v5 04/18] Introduce TCGOpcode for memory barrier Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 05/18] tcg/i386: Add support for fence Richard Henderson
2016-09-14 16:20 ` Richard Henderson [this message]
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 07/18] tcg/arm: " Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 08/18] tcg/ia64: " Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 09/18] tcg/mips: " Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 10/18] tcg/ppc: " Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 11/18] tcg/s390: " Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 12/18] tcg/sparc: " Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 13/18] tcg/tci: " Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 14/18] target-alpha: Generate fence op Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 15/18] target-arm: Generate fences in ARMv7 frontend Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 16/18] target-aarch64: Generate fences for aarch64 Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 17/18] target-i386: Generate fences for x86 Richard Henderson
2016-09-14 16:20 ` [Qemu-devel] [PULL v5 18/18] tcg: Optimize fence instructions Richard Henderson
2016-09-15 15:53 ` [Qemu-devel] [PULL v5 00/18] tcg queued patches Peter Maydell
2016-09-15 21:01   ` Richard Henderson

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