From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49456) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkW3Y-00023d-IO for qemu-devel@nongnu.org; Thu, 15 Sep 2016 08:46:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkW3U-0007Rz-Bm for qemu-devel@nongnu.org; Thu, 15 Sep 2016 08:46:19 -0400 Received: from 4.mo177.mail-out.ovh.net ([46.105.37.72]:48633) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkW3U-0007R8-1i for qemu-devel@nongnu.org; Thu, 15 Sep 2016 08:46:16 -0400 Received: from player699.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo177.mail-out.ovh.net (Postfix) with ESMTP id 64AC3FFCA5D for ; Thu, 15 Sep 2016 14:46:14 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Thu, 15 Sep 2016 14:45:50 +0200 Message-Id: <1473943560-14846-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 00/10] ppc/pnv: loading skiboot and booting the kernel List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org Cc: David Gibson , Benjamin Herrenschmidt , qemu-devel@nongnu.org, Cedric Le Goater Hello, Here is a new version addressing all comments from v2 plus a couple of important changes : - QOM'ification of all the models. should be clean. - some P9 basic support - PnvChip has its own routine to populate the device tree - rework of the XSCOM model to use an address space. see below. - LPC controller support and an ISA bus for a console=20 The patchset is more or less organised the same way, the initial patch provides a minimal platform with some RAM to load the ROMs : firmware, kernel and initrd. The device tree is built with what is available at reset time. Then, comes the PnvChip object acting as a container for other devices required to run a system. The cores are added to each chip with some restrictions on the number and the ids. Next is a proposal for a new model of XSCOM, the sideband bus which gives controls to all the units in the POWER8 chip. It now uses a specific address space to dispatch the accesses on the different chips but clearly, I am not satisfied with it. I either got it all wrong or the memory region do not permit what we are trying to achieve. Please check out patch 7, I took ownership of the model and did my grumbling there. Last is an initial LPC controller, which gives us a console ! The PowerNV platform now has enough support to start skiboot and see what is happening. Linux also loads but stops quite early in xmon when trying to setup the irqs : [ 0.000000] NR_IRQS:512 nr_irqs:512 16 [ 0.000000] XICS: Cannot find a Presentation Controller ! [ 0.000000] ------------[ cut here ]------------ [ 0.000000] WARNING: at arch/powerpc/platforms/powernv/setup.c:81 This is the next step : XICS native and support for real CPU ids. There are some initial patches and hacks for that in my dev branch. If you feel adventurous, you can give it a try here : https://github.com/legoater/qemu/commits/powernv-ipmi-2.8 Just add on the command line : -smp cores=3D8 You can grab skiboot and kernel images here :=20 https://openpower.xyz/job/openpower-op-build/distro=3Dubuntu,target=3Dp= almetto/lastSuccessfulBuild/artifact/images/skiboot.lid https://openpower.xyz/job/openpower-op-build/distro=3Dubuntu,target=3Dp= almetto/lastSuccessfulBuild/artifact/images/zImage.epapr https://openpower.xyz/job/openpower-op-build/distro=3Dubuntu,target=3Dp= almetto/lastSuccessfulBuild/artifact/images/rootfs.cpio.xz Thanks, C.=20 Benjamin Herrenschmidt (2): ppc/pnv: add skeleton PowerNV platform ppc/pnv: Add LPC controller and RTC C=C3=A9dric Le Goater (8): ppc/pnv: add a PnvChip object ppc/pnv: add a core mask to PnvChip ppc/pnv: add a PIR handler to PnvChip ppc/pnv: add a PnvCore object monitor: fix crash for platforms without a CPU 0 ppc/pnv: Add XSCOM infrastructure ppc/pnv: add a XScomDevice to PnvCore ppc/pnv: add a ISA bus default-configs/ppc64-softmmu.mak | 1 + hw/ppc/Makefile.objs | 2 + hw/ppc/pnv.c | 804 ++++++++++++++++++++++++++++++++= ++++++ hw/ppc/pnv_core.c | 239 +++++++++++ hw/ppc/pnv_lpc.c | 455 +++++++++++++++++++++ hw/ppc/pnv_xscom.c | 308 +++++++++++++++ include/hw/ppc/pnv.h | 134 +++++++ include/hw/ppc/pnv_core.h | 50 +++ include/hw/ppc/pnv_lpc.h | 63 +++ include/hw/ppc/pnv_xscom.h | 96 +++++ monitor.c | 2 +- 11 files changed, 2153 insertions(+), 1 deletion(-) create mode 100644 hw/ppc/pnv.c create mode 100644 hw/ppc/pnv_core.c create mode 100644 hw/ppc/pnv_lpc.c create mode 100644 hw/ppc/pnv_xscom.c create mode 100644 include/hw/ppc/pnv.h create mode 100644 include/hw/ppc/pnv_core.h create mode 100644 include/hw/ppc/pnv_lpc.h create mode 100644 include/hw/ppc/pnv_xscom.h --=20 2.7.4