From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41186) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkxFL-00067S-KB for qemu-devel@nongnu.org; Fri, 16 Sep 2016 13:48:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkxFK-0007Yj-NA for qemu-devel@nongnu.org; Fri, 16 Sep 2016 13:48:19 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:34026) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkxFK-0007YR-II for qemu-devel@nongnu.org; Fri, 16 Sep 2016 13:48:18 -0400 Received: by mail-pf0-f194.google.com with SMTP id 21so2444151pfy.1 for ; Fri, 16 Sep 2016 10:48:18 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Fri, 16 Sep 2016 10:46:41 -0700 Message-Id: <1474048017-26696-20-git-send-email-rth@twiddle.net> In-Reply-To: <1474048017-26696-1-git-send-email-rth@twiddle.net> References: <1474048017-26696-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v4 19/35] target-i386: emulate LOCK'ed INC using atomic helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Emilio G. Cota" From: "Emilio G. Cota" [rth: Merge gen_inc_locked back into gen_inc to share cc update.] Signed-off-by: Emilio G. Cota Message-Id: <1467054136-10430-14-git-send-email-cota@braap.org> Signed-off-by: Richard Henderson --- target-i386/translate.c | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index b5c7791..a38d953 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1362,21 +1362,23 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d) /* if d == OR_TMP0, it means memory operand (address in A0) */ static void gen_inc(DisasContext *s1, TCGMemOp ot, int d, int c) { - if (d != OR_TMP0) { - gen_op_mov_v_reg(ot, cpu_T0, d); + if (s1->prefix & PREFIX_LOCK) { + tcg_gen_movi_tl(cpu_T0, c > 0 ? 1 : -1); + tcg_gen_atomic_add_fetch_tl(cpu_T0, cpu_A0, cpu_T0, + s1->mem_index, ot | MO_LE); } else { - gen_op_ld_v(s1, ot, cpu_T0, cpu_A0); + if (d != OR_TMP0) { + gen_op_mov_v_reg(ot, cpu_T0, d); + } else { + gen_op_ld_v(s1, ot, cpu_T0, cpu_A0); + } + tcg_gen_addi_tl(cpu_T0, cpu_T0, (c > 0 ? 1 : -1)); + gen_op_st_rm_T0_A0(s1, ot, d); } + gen_compute_eflags_c(s1, cpu_cc_src); - if (c > 0) { - tcg_gen_addi_tl(cpu_T0, cpu_T0, 1); - set_cc_op(s1, CC_OP_INCB + ot); - } else { - tcg_gen_addi_tl(cpu_T0, cpu_T0, -1); - set_cc_op(s1, CC_OP_DECB + ot); - } - gen_op_st_rm_T0_A0(s1, ot, d); tcg_gen_mov_tl(cpu_cc_dst, cpu_T0); + set_cc_op(s1, (c > 0 ? CC_OP_INCB : CC_OP_DECB) + ot); } static void gen_shift_flags(DisasContext *s, TCGMemOp ot, TCGv result, -- 2.5.5