From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41249) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkxFQ-0006BM-D6 for qemu-devel@nongnu.org; Fri, 16 Sep 2016 13:48:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bkxFO-0007cG-E1 for qemu-devel@nongnu.org; Fri, 16 Sep 2016 13:48:23 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:34034) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bkxFO-0007c3-8O for qemu-devel@nongnu.org; Fri, 16 Sep 2016 13:48:22 -0400 Received: by mail-pf0-f194.google.com with SMTP id 21so2444193pfy.1 for ; Fri, 16 Sep 2016 10:48:22 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Fri, 16 Sep 2016 10:46:46 -0700 Message-Id: <1474048017-26696-25-git-send-email-rth@twiddle.net> In-Reply-To: <1474048017-26696-1-git-send-email-rth@twiddle.net> References: <1474048017-26696-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v4 24/35] target-i386: emulate XCHG using atomic helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Emilio G. Cota" From: "Emilio G. Cota" Signed-off-by: Emilio G. Cota Message-Id: <1467054136-10430-19-git-send-email-cota@braap.org> Signed-off-by: Richard Henderson --- target-i386/translate.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index e781869..c8827f3 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -5564,12 +5564,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_lea_modrm(env, s, modrm); gen_op_mov_v_reg(ot, cpu_T0, reg); /* for xchg, lock is implicit */ - if (!(prefixes & PREFIX_LOCK)) - gen_helper_lock(); - gen_op_ld_v(s, ot, cpu_T1, cpu_A0); - gen_op_st_v(s, ot, cpu_T0, cpu_A0); - if (!(prefixes & PREFIX_LOCK)) - gen_helper_unlock(); + tcg_gen_atomic_xchg_tl(cpu_T1, cpu_A0, cpu_T0, + s->mem_index, ot | MO_LE); gen_op_mov_reg_v(ot, reg, cpu_T1); } break; -- 2.5.5