From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51485) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bmWvS-0000D2-Qo for qemu-devel@nongnu.org; Tue, 20 Sep 2016 22:06:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bmWvO-0006Vn-KE for qemu-devel@nongnu.org; Tue, 20 Sep 2016 22:06:17 -0400 Message-ID: <1474423547.2857.109.camel@kernel.crashing.org> From: Benjamin Herrenschmidt Date: Wed, 21 Sep 2016 12:05:47 +1000 In-Reply-To: <20160921015156.GP20488@umbus> References: <1473943560-14846-1-git-send-email-clg@kaod.org> <1473943560-14846-6-git-send-email-clg@kaod.org> <20160921015156.GP20488@umbus> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 05/10] ppc/pnv: add a PnvCore object List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson , =?ISO-8859-1?Q?C=E9dric?= Le Goater Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On Wed, 2016-09-21 at 11:51 +1000, David Gibson wrote: > Ok, as noted elsewhere, I think you need to disassociate the PIR value > from the cpu_index.=C2=A0 It may be a little less elegant, but it'll ma= ke > your life much easier in the short and medium term. >=20 > Apart from that, this looks pretty good, though I have one suggested > cleanup below. As long as the PIR value is what is used everywhere, ie, interrupt controller, XSCOM addressing of the cores, Doorbells, etc... Cheers, Ben.