From: Brijesh Singh <brijesh.singh@amd.com>
To: ehabkost@redhat.com, crosthwaite.peter@gmail.com,
armbru@redhat.com, mst@redhat.com, p.fedin@samsung.com,
qemu-devel@nongnu.org, lcapitulino@redhat.com,
pbonzini@redhat.com, rth@twiddle.net
Subject: [Qemu-devel] [RFC PATCH v2 03/16] exec: add debug version of physical memory read and write apis
Date: Thu, 22 Sep 2016 10:52:20 -0400 [thread overview]
Message-ID: <147455594057.8519.18153674804012845873.stgit@brijesh-build-machine> (raw)
In-Reply-To: <147455590865.8519.11191009507297313736.stgit@brijesh-build-machine>
The patch adds the following new APIs:
- cpu_physical_memory_read_debug
- cpu_physical_memory_write_debug
- cpu_physical_memory_rw_debug
- ldl_phys_debug
- ldq_phys_debug
The idea behind this patch is that if all the qemu monitor memory dumps
and gdbserver accesses are done through these common APIs then in future
we can define some kind of global debug policy to control debug behavior.
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
exec.c | 32 ++++++++++++++++++++++++++++++++
include/exec/cpu-common.h | 15 +++++++++++++++
2 files changed, 47 insertions(+)
diff --git a/exec.c b/exec.c
index 0989933..9d0128e 100644
--- a/exec.c
+++ b/exec.c
@@ -3105,6 +3105,30 @@ uint32_t ldl_phys(AddressSpace *as, hwaddr addr)
return address_space_ldl(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
}
+uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr)
+{
+ MemTxAttrs attrs = MEMTXATTRS_DEBUG;
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ uint32_t val;
+
+ cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as,
+ addr, (void *) &val,
+ 4, attrs, READ_DATA);
+ return tswap32(val);
+}
+
+uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr)
+{
+ MemTxAttrs attrs = MEMTXATTRS_DEBUG;
+ int asidx = cpu_asidx_from_attrs(cpu, attrs);
+ uint64_t val;
+
+ cpu_physical_memory_rw_debug_internal(cpu->cpu_ases[asidx].as,
+ addr, (void *) &val,
+ 8, attrs, READ_DATA);
+ return val;
+}
+
uint32_t ldl_le_phys(AddressSpace *as, hwaddr addr)
{
return address_space_ldl_le(as, addr, MEMTXATTRS_UNSPECIFIED, NULL);
@@ -3615,6 +3639,14 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val)
address_space_stq_be(as, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
}
+void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf,
+ int len, int is_write)
+{
+ cpu_physical_memory_rw_debug_internal(&address_space_memory, addr,
+ buf, len, MEMTXATTRS_DEBUG,
+ is_write ? WRITE_DATA : READ_DATA);
+}
+
/* virtual memory access for debug (includes writing to ROM) */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
uint8_t *buf, int len, int is_write)
diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
index 520dae0..90598d4 100644
--- a/include/exec/cpu-common.h
+++ b/include/exec/cpu-common.h
@@ -61,6 +61,8 @@ const char *qemu_ram_get_idstr(RAMBlock *rb);
void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
int len, int is_write);
+void cpu_physical_memory_rw_debug(hwaddr addr, uint8_t *buf,
+ int len, int is_write);
static inline void cpu_physical_memory_read(hwaddr addr,
void *buf, int len)
{
@@ -71,6 +73,19 @@ static inline void cpu_physical_memory_write(hwaddr addr,
{
cpu_physical_memory_rw(addr, (void *)buf, len, 1);
}
+static inline void cpu_physical_memory_read_debug(hwaddr addr,
+ void *buf, int len)
+{
+ cpu_physical_memory_rw_debug(addr, buf, len, 0);
+}
+static inline void cpu_physical_memory_write_debug(hwaddr addr,
+ const void *buf, int len)
+{
+ cpu_physical_memory_rw_debug(addr, (void *)buf, len, 1);
+}
+uint32_t ldl_phys_debug(CPUState *cpu, hwaddr addr);
+uint64_t ldq_phys_debug(CPUState *cpu, hwaddr addr);
+
void *cpu_physical_memory_map(hwaddr addr,
hwaddr *plen,
int is_write);
next prev parent reply other threads:[~2016-09-22 14:52 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-22 14:51 [Qemu-devel] [RFC PATCH v2 00/16] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2016-09-22 14:52 ` [Qemu-devel] [RFC PATCH v2 01/16] memattrs: add debug attrs Brijesh Singh
2016-09-22 14:52 ` [Qemu-devel] [RFC PATCH v2 02/16] exec: add guest RAM read and write ops Brijesh Singh
2016-09-22 15:22 ` Paolo Bonzini
2016-09-22 14:52 ` Brijesh Singh [this message]
2016-09-22 15:21 ` [Qemu-devel] [RFC PATCH v2 03/16] exec: add debug version of physical memory read and write apis Paolo Bonzini
2016-09-22 14:52 ` [Qemu-devel] [RFC PATCH v2 04/16] monitor: use debug version of memory access apis Brijesh Singh
2016-09-22 15:18 ` Paolo Bonzini
2016-09-22 19:24 ` Michael S. Tsirkin
2016-09-22 20:55 ` Brijesh Singh
2016-09-22 14:52 ` [Qemu-devel] [RFC PATCH v2 05/16] core: add new security-policy object Brijesh Singh
2016-09-22 14:52 ` [Qemu-devel] [RFC PATCH v2 06/16] sev: add Secure Encrypted Virtulization (SEV) support Brijesh Singh
2016-09-22 15:12 ` Paolo Bonzini
2016-09-22 21:12 ` Brijesh Singh
2016-09-22 21:57 ` Michael S. Tsirkin
2016-09-22 19:51 ` Michael S. Tsirkin
2016-09-22 14:52 ` [Qemu-devel] [RFC PATCH v2 07/16] hmp: display memory encryption support in 'info kvm' Brijesh Singh
2016-09-22 15:32 ` Eric Blake
2016-09-22 14:53 ` [Qemu-devel] [RFC PATCH v2 08/16] core: loader: create memory encryption context before copying data Brijesh Singh
2016-09-22 14:53 ` [Qemu-devel] [RFC PATCH v2 09/16] sev: add LAUNCH_START command Brijesh Singh
2016-09-22 14:53 ` [Qemu-devel] [RFC PATCH v2 10/16] sev: add LAUNCH_UPDATE command Brijesh Singh
2016-09-22 14:53 ` [Qemu-devel] [RFC PATCH v2 11/16] sev: add LAUNCH_FINISH command Brijesh Singh
2016-09-22 14:53 ` [Qemu-devel] [RFC PATCH v2 12/16] sev: add DEBUG_DECRYPT command Brijesh Singh
2016-09-22 14:54 ` [Qemu-devel] [RFC PATCH v2 13/16] sev: add DEBUG_ENCRYPT command Brijesh Singh
2016-09-22 14:54 ` [Qemu-devel] [RFC PATCH v2 14/16] i386: set memory encryption ops for PC.BIOS and PC.RAM regions Brijesh Singh
2016-09-22 14:54 ` [Qemu-devel] [RFC PATCH v2 15/16] target-i386: add cpuid Fn8000_001f Brijesh Singh
2016-09-22 14:54 ` [Qemu-devel] [RFC PATCH v2 16/16] i386: clear C-bit in SEV guest page table walk Brijesh Singh
2016-09-22 15:53 ` [Qemu-devel] [RFC PATCH v2 00/16] x86: Secure Encrypted Virtualization (AMD) no-reply
2016-09-22 15:54 ` no-reply
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