From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48703) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bn5We-0002qZ-Qi for qemu-devel@nongnu.org; Thu, 22 Sep 2016 11:03:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bn5Wa-0002jn-By for qemu-devel@nongnu.org; Thu, 22 Sep 2016 11:02:59 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55386) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bn5Wa-0002je-5z for qemu-devel@nongnu.org; Thu, 22 Sep 2016 11:02:56 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A33E5C093563 for ; Thu, 22 Sep 2016 15:02:55 +0000 (UTC) From: Paolo Bonzini Date: Thu, 22 Sep 2016 17:02:50 +0200 Message-Id: <1474556571-21200-2-git-send-email-pbonzini@redhat.com> In-Reply-To: <1474556571-21200-1-git-send-email-pbonzini@redhat.com> References: <1474556571-21200-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 1/2] target-i386: introduce kvm_put_one_msr List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: dgilbert@redhat.com Avoid further code duplication in the next patch. Signed-off-by: Paolo Bonzini --- target-i386/kvm.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index f1ad805..38609fd 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -1532,6 +1532,16 @@ static void kvm_msr_entry_add(X86CPU *cpu, uint32_t index, uint64_t value) msrs->nmsrs++; } +static int kvm_put_one_msr(X86CPU *cpu, int index, uint64_t value) +{ + int ret; + + kvm_msr_buf_reset(cpu); + kvm_msr_entry_add(cpu, index, value); + + return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf); +} + static int kvm_put_tscdeadline_msr(X86CPU *cpu) { CPUX86State *env = &cpu->env; @@ -1541,10 +1551,7 @@ static int kvm_put_tscdeadline_msr(X86CPU *cpu) return 0; } - kvm_msr_buf_reset(cpu); - kvm_msr_entry_add(cpu, MSR_IA32_TSCDEADLINE, env->tsc_deadline); - - ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf); + ret = kvm_put_one_msr(cpu, MSR_IA32_TSCDEADLINE, env->tsc_deadline); if (ret < 0) { return ret; } @@ -1567,11 +1574,8 @@ static int kvm_put_msr_feature_control(X86CPU *cpu) return 0; } - kvm_msr_buf_reset(cpu); - kvm_msr_entry_add(cpu, MSR_IA32_FEATURE_CONTROL, - cpu->env.msr_ia32_feature_control); - - ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf); + ret = kvm_put_one_msr(cpu, MSR_IA32_FEATURE_CONTROL, + cpu->env.msr_ia32_feature_control); if (ret < 0) { return ret; } -- 2.7.4