From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 14/36] aspeed: add a ram_size property to the memory controller
Date: Thu, 22 Sep 2016 18:21:53 +0100 [thread overview]
Message-ID: <1474564935-23831-15-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1474564935-23831-1-git-send-email-peter.maydell@linaro.org>
From: Cédric Le Goater <clg@kaod.org>
Configure the size of the RAM of the SOC using a property to propagate
the value down to the memory controller from the board level.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1473438177-26079-14-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/aspeed.c | 2 ++
hw/arm/aspeed_soc.c | 2 ++
hw/misc/aspeed_sdmc.c | 23 +++++++++++++----------
include/hw/misc/aspeed_sdmc.h | 1 +
4 files changed, 18 insertions(+), 10 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 9013d35..562bbb2 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -113,6 +113,8 @@ static void aspeed_board_init(MachineState *machine,
&bmc->ram);
object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
&error_abort);
+ object_property_set_int(OBJECT(&bmc->soc), ram_size, "ram-size",
+ &error_abort);
object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
&error_abort);
object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 93bc7bb..c0a3102 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -113,6 +113,8 @@ static void aspeed_soc_init(Object *obj)
qdev_set_parent_bus(DEVICE(&s->sdmc), sysbus_get_default());
qdev_prop_set_uint32(DEVICE(&s->sdmc), "silicon-rev",
sc->info->silicon_rev);
+ object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc),
+ "ram-size", &error_abort);
}
static void aspeed_soc_realize(DeviceState *dev, Error **errp)
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 20bcdb5..8830dc0 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -140,9 +140,9 @@ static const MemoryRegionOps aspeed_sdmc_ops = {
.valid.max_access_size = 4,
};
-static int ast2400_rambits(void)
+static int ast2400_rambits(AspeedSDMCState *s)
{
- switch (ram_size >> 20) {
+ switch (s->ram_size >> 20) {
case 64:
return ASPEED_SDMC_DRAM_64MB;
case 128:
@@ -156,14 +156,15 @@ static int ast2400_rambits(void)
}
/* use a common default */
- error_report("warning: Invalid RAM size 0x" RAM_ADDR_FMT
- ". Using default 256M", ram_size);
+ error_report("warning: Invalid RAM size 0x%" PRIx64
+ ". Using default 256M", s->ram_size);
+ s->ram_size = 256 << 20;
return ASPEED_SDMC_DRAM_256MB;
}
-static int ast2500_rambits(void)
+static int ast2500_rambits(AspeedSDMCState *s)
{
- switch (ram_size >> 20) {
+ switch (s->ram_size >> 20) {
case 128:
return ASPEED_SDMC_AST2500_128MB;
case 256:
@@ -177,8 +178,9 @@ static int ast2500_rambits(void)
}
/* use a common default */
- error_report("warning: Invalid RAM size 0x" RAM_ADDR_FMT
- ". Using default 512M", ram_size);
+ error_report("warning: Invalid RAM size 0x%" PRIx64
+ ". Using default 512M", s->ram_size);
+ s->ram_size = 512 << 20;
return ASPEED_SDMC_AST2500_512MB;
}
@@ -222,11 +224,11 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
switch (s->silicon_rev) {
case AST2400_A0_SILICON_REV:
- s->ram_bits = ast2400_rambits();
+ s->ram_bits = ast2400_rambits(s);
break;
case AST2500_A0_SILICON_REV:
case AST2500_A1_SILICON_REV:
- s->ram_bits = ast2500_rambits();
+ s->ram_bits = ast2500_rambits(s);
break;
default:
g_assert_not_reached();
@@ -249,6 +251,7 @@ static const VMStateDescription vmstate_aspeed_sdmc = {
static Property aspeed_sdmc_properties[] = {
DEFINE_PROP_UINT32("silicon-rev", AspeedSDMCState, silicon_rev, 0),
+ DEFINE_PROP_UINT64("ram-size", AspeedSDMCState, ram_size, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h
index df7dce0..551c8af 100644
--- a/include/hw/misc/aspeed_sdmc.h
+++ b/include/hw/misc/aspeed_sdmc.h
@@ -26,6 +26,7 @@ typedef struct AspeedSDMCState {
uint32_t regs[ASPEED_SDMC_NR_REGS];
uint32_t silicon_rev;
uint32_t ram_bits;
+ uint64_t ram_size;
} AspeedSDMCState;
--
2.7.4
next prev parent reply other threads:[~2016-09-22 17:22 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-22 17:21 [Qemu-devel] [PULL 00/36] target-arm queue Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 01/36] arm: add Cortex A7 CPU parameters Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 02/36] ast2400: rename the Aspeed SoC files to aspeed_soc Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 03/36] ast2400: replace ast2400 with aspeed_soc Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 04/36] aspeed-soc: provide a framework to add new SoCs Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 05/36] palmetto-bmc: rename the Aspeed board file to aspeed.c Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 06/36] palmetto-bmc: replace palmetto_bmc with aspeed Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 07/36] palmetto-bmc: add board specific configuration Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 08/36] hw/misc: use macros to define hw-strap1 register on the AST2400 Aspeed SoC Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 09/36] aspeed: add a ast2500 SoC and support to the SCU and SDMC controllers Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 10/36] arm: add support for an ast2500 evaluation board Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 11/36] palmetto-bmc: remove extra no_sdcard assignement Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 12/36] aspeed: calculate the RAM size bits at realize time Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 13/36] aspeed: use error_report instead of LOG_GUEST_ERROR Peter Maydell
2016-09-22 17:21 ` Peter Maydell [this message]
2016-09-22 17:21 ` [Qemu-devel] [PULL 15/36] aspeed: allocate RAM after the memory controller has checked the size Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 16/36] hw/ptimer: Actually stop the timer in case of error Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 17/36] hw/ptimer: Introduce timer policy feature Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 18/36] hw/ptimer: Suppress error messages under qtest Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 19/36] tests: Add ptimer tests Peter Maydell
2016-09-22 17:21 ` [Qemu-devel] [PULL 20/36] cadence_gem: QOMify Cadence GEM Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 21/36] cadence_gem: Add the num-priority-queues property Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 22/36] cadence_gem: Add support for screening Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 23/36] cadence_gem: Add queue support Peter Maydell
2016-09-26 11:01 ` Paolo Bonzini
2016-09-26 17:43 ` Alistair Francis
2016-09-22 17:22 ` [Qemu-devel] [PULL 24/36] cadence_gem: Correct indentation Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 25/36] xlnx-zynqmp: Set the number of priority queues Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 26/36] loader: Allow ELF loader to auto-detect the ELF arch Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 27/36] loader: Use the specified MemoryRegion Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 28/36] loader: Allow a custom AddressSpace when loading ROMs Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 29/36] loader: Add AddressSpace loading support to ELFs Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 30/36] loader: Add AddressSpace loading support to uImages Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 31/36] loader: Add AddressSpace loading support to targphys Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 32/36] dma: xlnx-zynq-devcfg: Fix up XLNX_ZYNQ_DEVCFG_R_MAX Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 33/36] vmstateify ssd0323 display Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 34/36] vmstateify ssi-sd Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 35/36] disas/arm.c: Remove unused macro definitions Peter Maydell
2016-09-22 17:22 ` [Qemu-devel] [PULL 36/36] imx: Use 'const char', not 'char const' Peter Maydell
2016-09-22 19:58 ` [Qemu-devel] [PULL 00/36] target-arm queue no-reply
2016-09-23 9:57 ` Peter Maydell
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