From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52635) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bolba-0005R1-Ky for qemu-devel@nongnu.org; Tue, 27 Sep 2016 02:11:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bolbV-0005fI-CE for qemu-devel@nongnu.org; Tue, 27 Sep 2016 02:11:02 -0400 Message-ID: <1474956641.2857.277.camel@kernel.crashing.org> From: Benjamin Herrenschmidt Date: Tue, 27 Sep 2016 16:10:41 +1000 In-Reply-To: References: <1473943560-14846-1-git-send-email-clg@kaod.org> <1473943560-14846-8-git-send-email-clg@kaod.org> <20160921060845.GC20488@umbus> <20160923024654.GT2085@umbus.fritz.box> <20160927023548.GC15376@umbus.fritz.box> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v3 07/10] ppc/pnv: add XSCOM infrastructure List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-1?Q?C=E9dric?= Le Goater , David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On Tue, 2016-09-27 at 07:54 +0200, C=C3=A9dric Le Goater wrote: >=20 > > but I guess if you have the decoding of those "core" registers=C2=A0 > > here as well, then that doesn't make so much sense. Those core registers may well change with P9, we havne't looked closely yet... > yes and there is also the handling of the XSCOM failures. >=20 > I can add some prologue handler to cover those "core" registers > but adding a MemoryRegion, ops, init and mapping would be a lot=C2=A0 > of churn just to return 0. >=20 > Thanks,