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From: Eduardo Habkost <ehabkost@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 10/20] target-i386: xsave: Calculate enabled components only once
Date: Tue, 27 Sep 2016 17:12:20 -0300	[thread overview]
Message-ID: <1475007150-14665-11-git-send-email-ehabkost@redhat.com> (raw)
In-Reply-To: <1475007150-14665-1-git-send-email-ehabkost@redhat.com>

Instead of checking both env->features and ena_mask at two
different places in the CPUID code, initialize ena_mask based on
the features that are enabled for the CPU, and then clear
unsupported bits based on kvm_arch_get_supported_cpuid().

The results should be exactly the same, but it will make it
easier to move the mask calculation elsewhare, and reuse
x86_cpu_filter_features() for the kvm_arch_get_supported_cpuid()
check.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
 target-i386/cpu.c | 26 ++++++++++++++++----------
 1 file changed, 16 insertions(+), 10 deletions(-)

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 25ab4f8..9968581 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2490,7 +2490,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         *ebx &= 0xffff; /* The count doesn't need to be reliable. */
         break;
     case 0xD: {
-        KVMState *s = cs->kvm_state;
         uint64_t ena_mask;
         int i;
 
@@ -2502,20 +2501,28 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) {
             break;
         }
+
+        ena_mask = (XSTATE_FP_MASK | XSTATE_SSE_MASK);
+        for (i = 2; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
+            const ExtSaveArea *esa = &x86_ext_save_areas[i];
+            if (env->features[esa->feature] & esa->bits) {
+                ena_mask |= (1ULL << i);
+            }
+        }
+
         if (kvm_enabled()) {
-            ena_mask = kvm_arch_get_supported_cpuid(s, 0xd, 0, R_EDX);
-            ena_mask <<= 32;
-            ena_mask |= kvm_arch_get_supported_cpuid(s, 0xd, 0, R_EAX);
-        } else {
-            ena_mask = -1;
+            KVMState *s = cs->kvm_state;
+            uint64_t kvm_mask = kvm_arch_get_supported_cpuid(s, 0xd, 0, R_EDX);
+            kvm_mask <<= 32;
+            kvm_mask |= kvm_arch_get_supported_cpuid(s, 0xd, 0, R_EAX);
+            ena_mask &= kvm_mask;
         }
 
         if (count == 0) {
             *ecx = 0x240;
             for (i = 2; i < ARRAY_SIZE(x86_ext_save_areas); i++) {
                 const ExtSaveArea *esa = &x86_ext_save_areas[i];
-                if ((env->features[esa->feature] & esa->bits)
-                    && ((ena_mask >> i) & 1) != 0) {
+                if ((ena_mask >> i) & 1) {
                     if (i < 32) {
                         *eax |= 1u << i;
                     } else {
@@ -2530,8 +2537,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             *eax = env->features[FEAT_XSAVE];
         } else if (count < ARRAY_SIZE(x86_ext_save_areas)) {
             const ExtSaveArea *esa = &x86_ext_save_areas[count];
-            if ((env->features[esa->feature] & esa->bits)
-                && ((ena_mask >> count) & 1) != 0) {
+            if ((ena_mask >> count) & 1) {
                 *eax = esa->size;
                 *ebx = esa->offset;
             }
-- 
2.7.4

  parent reply	other threads:[~2016-09-27 20:13 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-27 20:12 [Qemu-devel] [PULL 00/20] x86 and machine queue, 2016-09-27 Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 01/20] target-i386: Remove unused X86CPUDefinition::xlevel2 field Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 02/20] target-i386: Add a marker to end of the region zeroed on reset Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 03/20] tests: Add test code for CPUID level/xlevel handling Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 04/20] tests: Test CPUID level handling for old machines Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 05/20] target-i386: Automatically set level/xlevel/xlevel2 when needed Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 06/20] target-i386: Enable CPUID[0x8000000A] if SVM is enabled Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 07/20] linux-user: remove #define smp_{cores, threads} Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 08/20] target-i386: Move feature name arrays inside FeatureWordInfo Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 09/20] target-i386: Don't try to enable PT State xsave component Eduardo Habkost
2016-09-27 20:12 ` Eduardo Habkost [this message]
2016-09-27 20:12 ` [Qemu-devel] [PULL 11/20] target-i386: xsave: Simplify CPUID[0xD, 0].{EAX, EDX} calculation Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 12/20] target-i386: xsave: Helper function to calculate xsave area size Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 13/20] target-i386: xsave: Calculate set of xsave components on realize Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 14/20] target-i386: Move xsave component mask to features array Eduardo Habkost
2016-10-03 16:42   ` Daniel P. Berrange
2016-10-03 19:10     ` Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 15/20] target-i386: Remove has_msr_mtrr global variable Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 16/20] target-i386: Remove has_msr_hv_apic " Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 17/20] target-i386: Remove has_msr_hv_tsc " Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 18/20] target-i386: Clear KVM CPUID features if KVM is disabled Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 19/20] target-i386: Remove has_msr_* global vars for KVM features Eduardo Habkost
2016-09-27 20:12 ` [Qemu-devel] [PULL 20/20] sysbus: Remove ignored return value of FindSysbusDeviceFunc Eduardo Habkost
2016-09-27 23:31 ` [Qemu-devel] [PULL 00/20] x86 and machine queue, 2016-09-27 Peter Maydell

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