From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52542) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bozr6-0002hy-9l for qemu-devel@nongnu.org; Tue, 27 Sep 2016 17:24:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bozr2-0008TC-Cs for qemu-devel@nongnu.org; Tue, 27 Sep 2016 17:23:59 -0400 Received: from mail-pf0-x244.google.com ([2607:f8b0:400e:c00::244]:35399) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bozr2-0008Sh-5a for qemu-devel@nongnu.org; Tue, 27 Sep 2016 17:23:56 -0400 Received: by mail-pf0-x244.google.com with SMTP id 6so1204836pfl.2 for ; Tue, 27 Sep 2016 14:23:56 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 27 Sep 2016 14:23:51 -0700 Message-Id: <1475011433-24456-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 0/2] tcg: Add tcg_gen_mulsu2_* List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Sagar Karandikar While reviewing the recent riscv patch set, I made a suggestion to copy some of the bits from tcg_gen_muls2_i64 in order to implement the mulhsu instruction. However, I noticed that the same operation is present in another target, so I thought that it would be better to have this as a standard operation. r~ Richard Henderson (2): tcg: Add tcg_gen_mulsu2_{i32,i64,tl} target-microblaze: Cleanup dec_mul target-microblaze/translate.c | 61 +++++++------------------------------------ tcg/tcg-op.c | 43 ++++++++++++++++++++++++++++++ tcg/tcg-op.h | 4 +++ 3 files changed, 56 insertions(+), 52 deletions(-) -- 2.5.5