From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51188) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bp7TL-0000jU-8R for qemu-devel@nongnu.org; Wed, 28 Sep 2016 01:32:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bp7TG-0002LN-BY for qemu-devel@nongnu.org; Wed, 28 Sep 2016 01:31:58 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:36328) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bp7TG-0002Kz-2l for qemu-devel@nongnu.org; Wed, 28 Sep 2016 01:31:54 -0400 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u8S5S7Wi037711 for ; Wed, 28 Sep 2016 01:31:53 -0400 Received: from e23smtp08.au.ibm.com (e23smtp08.au.ibm.com [202.81.31.141]) by mx0a-001b2d01.pphosted.com with ESMTP id 25r4h10m3f-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 28 Sep 2016 01:31:53 -0400 Received: from localhost by e23smtp08.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 28 Sep 2016 15:31:51 +1000 From: Nikunj A Dadhania Date: Wed, 28 Sep 2016 11:01:26 +0530 In-Reply-To: <1475040687-27523-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1475040687-27523-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1475040687-27523-9-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v4 8/9] target-ppc: add lxvb16x instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, benh@kernel.crashing.org lxvb16x: Load VSX Vector Byte*16 Little/Big-endian Storage +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ Vector load results in: +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ Signed-off-by: Nikunj A Dadhania --- target-ppc/translate/vsx-impl.inc.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/target-ppc/translate/vsx-impl.inc.c b/target-ppc/translate/vsx-impl.inc.c index 35168af..54e0c1e 100644 --- a/target-ppc/translate/vsx-impl.inc.c +++ b/target-ppc/translate/vsx-impl.inc.c @@ -135,6 +135,25 @@ static void gen_lxvh8x(DisasContext *ctx) tcg_temp_free(EA); } +static void gen_lxvb16x(DisasContext *ctx) +{ + TCGv EA; + TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); + TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); + + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + gen_addr_reg_index(ctx, EA); + tcg_gen_qemu_ld_i64(xth, EA, ctx->mem_idx, MO_BEQ); + tcg_gen_addi_tl(EA, EA, 8); + tcg_gen_qemu_ld_i64(xtl, EA, ctx->mem_idx, MO_BEQ); + tcg_temp_free(EA); +} + #define VSX_STORE_SCALAR(name, operation) \ static void gen_##name(DisasContext *ctx) \ { \ -- 2.7.4