From: Artyom Tarasenko <atar4qemu@gmail.com>
To: qemu-devel@nongnu.org
Cc: Richard Henderson <rth@twiddle.net>,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Artyom Tarasenko <atar4qemu@gmail.com>
Subject: [Qemu-devel] [PATCH 15/29] target-sparc: allow priveleged ASIs in hyperprivileged mode
Date: Sat, 1 Oct 2016 12:05:19 +0200 [thread overview]
Message-ID: <1475316333-9776-16-git-send-email-atar4qemu@gmail.com> (raw)
In-Reply-To: <1475316333-9776-1-git-send-email-atar4qemu@gmail.com>
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
---
target-sparc/ldst_helper.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index 5fb9024..70febcb 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -1295,10 +1295,9 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
asi &= 0xff;
- if ((asi < 0x80 && (env->pstate & PS_PRIV) == 0)
- || (cpu_has_hypervisor(env)
- && asi >= 0x30 && asi < 0x80
- && !(env->hpstate & HS_PRIV))) {
+ if (((!cpu_hypervisor_mode(env)) && asi < 0x80)
+ && (((env->pstate & PS_PRIV) == 0)
+ || (cpu_has_hypervisor(env) && asi >= 0x30))) {
helper_raise_exception(env, TT_PRIV_ACT);
}
@@ -1727,10 +1726,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
asi &= 0xff;
- if ((asi < 0x80 && (env->pstate & PS_PRIV) == 0)
- || (cpu_has_hypervisor(env)
- && asi >= 0x30 && asi < 0x80
- && !(env->hpstate & HS_PRIV))) {
+ if (((!cpu_hypervisor_mode(env)) && asi < 0x80)
+ && (((env->pstate & PS_PRIV) == 0)
+ || (cpu_has_hypervisor(env) && asi >= 0x30))) {
helper_raise_exception(env, TT_PRIV_ACT);
}
--
2.7.2
next prev parent reply other threads:[~2016-10-01 10:07 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-01 10:05 [Qemu-devel] [PATCH 00/29] target-sparc: add Niagara OpenSPARC T1 sun4v emulation Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 01/29] target-sparc: don't trap on MMU-fault if MMU is disabled Artyom Tarasenko
2016-10-10 21:14 ` Richard Henderson
2016-10-11 14:00 ` Artyom Tarasenko
2016-10-11 14:50 ` Richard Henderson
2016-10-12 13:24 ` Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 02/29] target-sparc: use explicit mmu register pointers Artyom Tarasenko
2016-10-10 21:18 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 03/29] target-sparc: add UA2005 TTE bit #defines Artyom Tarasenko
2016-10-10 21:22 ` Richard Henderson
2016-10-10 21:45 ` Artyom Tarasenko
2016-10-11 5:50 ` Richard Henderson
2016-10-11 13:51 ` Artyom Tarasenko
2016-10-11 15:08 ` Richard Henderson
2016-10-12 11:18 ` Artyom Tarasenko
2016-10-12 13:25 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 04/29] target-sparc: add UltraSPARC T1 TLB #defines Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 05/29] target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode Artyom Tarasenko
2016-10-10 21:23 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 06/29] target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE Artyom Tarasenko
2016-10-10 21:25 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 07/29] target-sparc: implement UA2005 scratchpad registers Artyom Tarasenko
2016-10-10 21:37 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 08/29] target-sparc: implement UltraSPARC-T1 Strand status ASR Artyom Tarasenko
2016-10-10 21:38 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 09/29] target-sparc: hypervisor mode takes over nucleus mode Artyom Tarasenko
2016-10-10 21:41 ` Richard Henderson
2016-10-12 11:33 ` Artyom Tarasenko
2016-10-12 13:29 ` Richard Henderson
2016-11-01 18:12 ` Artyom Tarasenko
2016-11-01 19:29 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 10/29] target-sparc: implement UA2005 hypervisor traps Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 11/29] target-sparc: implement UA2005 GL register Artyom Tarasenko
2016-10-10 21:45 ` Richard Henderson
2016-10-11 13:54 ` Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 12/29] target-sparc: implement UA2005 rdhpstate and wrhpstate instructions Artyom Tarasenko
2016-10-10 21:46 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 13/29] target-sparc: fix immediate UA2005 traps Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 14/29] target-sparc: use direct address translation in hyperprivileged mode Artyom Tarasenko
2016-10-11 5:55 ` Richard Henderson
2016-10-01 10:05 ` Artyom Tarasenko [this message]
2016-10-11 13:57 ` [Qemu-devel] [PATCH 15/29] target-sparc: allow priveleged ASIs " Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 16/29] target-sparc: ignore writes to UA2005 CPU mondo queue register Artyom Tarasenko
2016-10-11 13:57 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 17/29] target-sparc: replace the last tlb entry when no free entries left Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 18/29] target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs Artyom Tarasenko
2016-10-10 20:13 ` Richard Henderson
2016-10-11 13:56 ` Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 19/29] target-sparc: implement UA2005 TSB Pointers Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 20/29] target-sparc: simplify ultrasparc_tsb_pointer Artyom Tarasenko
2016-10-11 14:05 ` Richard Henderson
2016-10-11 14:08 ` Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 21/29] target-sparc: allow 256M sized pages Artyom Tarasenko
2016-10-11 14:07 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 22/29] target-sparc: implement auto-demapping for UA2005 CPUs Artyom Tarasenko
2016-10-11 14:17 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 23/29] target-sparc: implement ST_BLKINIT_ ASIs Artyom Tarasenko
2016-10-11 14:22 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 24/29] target-sparc: add more registers to dump_mmu Artyom Tarasenko
2016-10-11 14:22 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 25/29] target-sparc: implement UA2005 ASI_MMU (0x21) Artyom Tarasenko
2016-10-11 14:25 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 26/29] target-sparc: store the UA2005 entries in sun4u format Artyom Tarasenko
2016-10-11 14:31 ` Richard Henderson
2016-10-12 11:28 ` Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 27/29] target-sparc: implement sun4v RTC Artyom Tarasenko
2016-10-01 10:05 ` [Qemu-devel] [PATCH 28/29] target-sparc: move common cpu initialisation routines to sparc64.c Artyom Tarasenko
2016-10-11 14:34 ` Richard Henderson
2016-10-01 10:05 ` [Qemu-devel] [PATCH 29/29] target-sparc: fix up Niagara machine Artyom Tarasenko
2016-10-11 14:43 ` Richard Henderson
2016-10-12 11:27 ` Artyom Tarasenko
2016-10-01 10:48 ` [Qemu-devel] [PATCH 00/29] target-sparc: add Niagara OpenSPARC T1 sun4v emulation no-reply
2016-10-11 21:52 ` Mark Cave-Ayland
2016-10-12 11:58 ` Artyom Tarasenko
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