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From: Andrew Jeffery <andrew@aj.id.au>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Peter Crosthwaite" <crosthwaite.peter@gmail.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/6] aspeed: rename the smc object to fmc
Date: Wed, 05 Oct 2016 09:58:03 +1030	[thread overview]
Message-ID: <1475623683.5030.2.camel@aj.id.au> (raw)
In-Reply-To: <1474977462-28032-2-git-send-email-clg@kaod.org>

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On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
> The Aspeed SoC has three different types of SMC (Static Memory
> Controller) controllers: the SMC (legacy), the FMC (the new one) and
> the SPI for the host PNOR. The FMC and the SPI models are now
> converging on the AST2500 SoC and the SMC, which was still available
> on the AST2400 SoC, was removed.
> 
> The Aspeed SoC does not provide support for the legacy SMC
> controller. So, let's rename the 'smc' object to 'fmc' to clarify its
> nature.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>

> ---
>  hw/arm/aspeed.c             |  2 +-
>  hw/arm/aspeed_soc.c         | 18 +++++++++---------
>  include/hw/arm/aspeed_soc.h |  2 +-
>  3 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index 6b18c7f1727c..4bb33cbb5e70 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -128,7 +128,7 @@ static void aspeed_board_init(MachineState *machine,
>      object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
>                                     &error_abort);
>  
> -    aspeed_board_init_flashes(&bmc->soc.smc, "n25q256a", &error_abort);
> +    aspeed_board_init_flashes(&bmc->soc.fmc, "n25q256a", &error_abort);
>      aspeed_board_init_flashes(&bmc->soc.spi, "mx25l25635e", &error_abort);
>  
>      aspeed_board_binfo.kernel_filename = machine->kernel_filename;
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index c0a310205842..479c0d2039d9 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -100,9 +100,9 @@ static void aspeed_soc_init(Object *obj)
>      object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu),
>                                "hw-strap2", &error_abort);
>  
> -    object_initialize(&s->smc, sizeof(s->smc), "aspeed.smc.fmc");
> -    object_property_add_child(obj, "smc", OBJECT(&s->smc), NULL);
> -    qdev_set_parent_bus(DEVICE(&s->smc), sysbus_get_default());
> +    object_initialize(&s->fmc, sizeof(s->fmc), "aspeed.smc.fmc");
> +    object_property_add_child(obj, "fmc", OBJECT(&s->fmc), NULL);
> +    qdev_set_parent_bus(DEVICE(&s->fmc), sysbus_get_default());
>  
>      object_initialize(&s->spi, sizeof(s->spi), "aspeed.smc.spi");
>      object_property_add_child(obj, "spi", OBJECT(&s->spi), NULL);
> @@ -178,17 +178,17 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
>      sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0,
>                         qdev_get_gpio_in(DEVICE(&s->vic), 12));
>  
> -    /* SMC */
> -    object_property_set_int(OBJECT(&s->smc), 1, "num-cs", &err);
> -    object_property_set_bool(OBJECT(&s->smc), true, "realized", &local_err);
> +    /* FMC */
> +    object_property_set_int(OBJECT(&s->fmc), 1, "num-cs", &err);
> +    object_property_set_bool(OBJECT(&s->fmc), true, "realized", &local_err);
>      error_propagate(&err, local_err);
>      if (err) {
>          error_propagate(errp, err);
>          return;
>      }
> -    sysbus_mmio_map(SYS_BUS_DEVICE(&s->smc), 0, ASPEED_SOC_FMC_BASE);
> -    sysbus_mmio_map(SYS_BUS_DEVICE(&s->smc), 1, ASPEED_SOC_FMC_FLASH_BASE);
> -    sysbus_connect_irq(SYS_BUS_DEVICE(&s->smc), 0,
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, ASPEED_SOC_FMC_BASE);
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 1, ASPEED_SOC_FMC_FLASH_BASE);
> +    sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
>                         qdev_get_gpio_in(DEVICE(&s->vic), 19));
>  
>      /* SPI */
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index 932704c380f2..7359e25fce49 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -31,7 +31,7 @@ typedef struct AspeedSoCState {
>      AspeedTimerCtrlState timerctrl;
>      AspeedI2CState i2c;
>      AspeedSCUState scu;
> -    AspeedSMCState smc;
> +    AspeedSMCState fmc;
>      AspeedSMCState spi;
>      AspeedSDMCState sdmc;
>  } AspeedSoCState;

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  reply	other threads:[~2016-10-04 23:28 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-27 11:57 [Qemu-devel] [PATCH 0/6] aspeed: add support for the ast2500 SMC controllers Cédric Le Goater
2016-09-27 11:57 ` [Qemu-devel] [PATCH 1/6] aspeed: rename the smc object to fmc Cédric Le Goater
2016-10-04 23:28   ` Andrew Jeffery [this message]
2016-09-27 11:57 ` [Qemu-devel] [PATCH 2/6] aspeed: move the flash module mapping address under the controller definition Cédric Le Goater
2016-10-04 23:30   ` Andrew Jeffery
2016-09-27 11:57 ` [Qemu-devel] [PATCH 3/6] aspeed: extend the number of host SPI controllers Cédric Le Goater
2016-10-04 23:32   ` Andrew Jeffery
2016-09-27 11:57 ` [Qemu-devel] [PATCH 4/6] aspeed: add support for the AST2500 SoC SMC controllers Cédric Le Goater
2016-10-04 23:34   ` Andrew Jeffery
2016-09-27 11:57 ` [Qemu-devel] [PATCH 5/6] aspeed: create mapping regions for the maximum number of slaves Cédric Le Goater
2016-10-04 23:36   ` Andrew Jeffery
2016-09-27 11:57 ` [Qemu-devel] [PATCH 6/6] aspeed: add support for the SMC segment registers Cédric Le Goater
2016-10-04 23:53   ` Andrew Jeffery
2016-10-05  6:14     ` Cédric Le Goater
2016-10-07 14:13 ` [Qemu-devel] [PATCH 0/6] aspeed: add support for the ast2500 SMC controllers Peter Maydell

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