From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com,
benh@kernel.crashing.org
Subject: [Qemu-devel] [PATCH 0/4] POWER9 TCG enablements - part6
Date: Sat, 8 Oct 2016 00:26:59 +0530 [thread overview]
Message-ID: <1475866623-16841-1-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
This series contains 15 new instructions for POWER9 ISA3.0
Vector Extend Sign
Vector Integer Negate
VSX Scalar Compare
Vector Byte-Reverse
Patches:
01:
vextsb2w: Vector Extend Sign Byte To Word
vextsh2w: Vector Extend Sign Halfword To Word
vextsb2d: Vector Extend Sign Byte To Doubleword
vextsh2d: Vector Extend Sign Halfword To Doubleword
vextsw2d: Vector Extend Sign Word To Doubleword
02:
vnegw: Vector Negate Word
vnegd: Vector Negate Doubleword
03:
xxbrh: VSX Vector Byte-Reverse Halfword
xxbrw: VSX Vector Byte-Reverse Word
xxbrd: VSX Vector Byte-Reverse Doubleword
xxbrq: VSX Vector Byte-Reverse Quadword
04:
xscmpeqdp: VSX Scalar Compare Equal Double-Precision
xscmpgedp: VSX Scalar Compare Greater Than or Equal Double-Precision
xscmpgtdp: VSX Scalar Compare Greater Than Double-Precision
xscmpnedp: VSX Scalar Compare Not Equal Double-Precision
Nikunj A Dadhania (3):
target-ppc: implement vexts[bh]2w and vexts[bhw]2d
target-ppc: implement vnegw/d instructions
target-ppc: implement xxbr[qdwh] instruction
Sandipan Das (1):
target-ppc: Add xscmp[eq,gt,ge,ne]dp instructions
target-ppc/fpu_helper.c | 48 +++++++++++++++++++++++
target-ppc/helper.h | 11 ++++++
target-ppc/int_helper.c | 27 +++++++++++++
target-ppc/translate.c | 32 +++++++++++++++
target-ppc/translate/vmx-impl.inc.c | 7 ++++
target-ppc/translate/vmx-ops.inc.c | 7 ++++
target-ppc/translate/vsx-impl.inc.c | 78 +++++++++++++++++++++++++++++++++++++
target-ppc/translate/vsx-ops.inc.c | 12 ++++++
8 files changed, 222 insertions(+)
--
2.7.4
next reply other threads:[~2016-10-07 18:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-07 18:56 Nikunj A Dadhania [this message]
2016-10-07 18:57 ` [Qemu-devel] [PATCH 1/4] target-ppc: implement vexts[bh]2w and vexts[bhw]2d Nikunj A Dadhania
2016-10-09 23:07 ` Richard Henderson
2016-10-10 5:05 ` Nikunj A Dadhania
2016-10-07 18:57 ` [Qemu-devel] [PATCH 2/4] target-ppc: implement vnegw/d instructions Nikunj A Dadhania
2016-10-09 23:09 ` Richard Henderson
2016-10-10 5:12 ` Nikunj A Dadhania
2016-10-07 18:57 ` [Qemu-devel] [PATCH 3/4] target-ppc: implement xxbr[qdwh] instruction Nikunj A Dadhania
2016-10-10 15:33 ` Richard Henderson
2016-10-10 15:43 ` Nikunj A Dadhania
2016-10-07 18:57 ` [Qemu-devel] [PATCH 4/4] target-ppc: Add xscmp[eq, gt, ge, ne]dp instructions Nikunj A Dadhania
2016-10-10 15:53 ` Richard Henderson
2016-10-10 16:06 ` Nikunj A Dadhania
2016-10-10 16:18 ` [Qemu-devel] [PATCH 0/4] POWER9 TCG enablements - part6 no-reply
2016-10-12 4:59 ` Nikunj A Dadhania
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