qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: alex.bennee@linaro.org, "Emilio G. Cota" <cota@braap.org>
Subject: [Qemu-devel] [PATCH v5 21/35] target-i386: emulate LOCK'ed NEG using cmpxchg helper
Date: Sun,  9 Oct 2016 18:41:52 -0500	[thread overview]
Message-ID: <1476056526-30740-22-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1476056526-30740-1-git-send-email-rth@twiddle.net>

From: "Emilio G. Cota" <cota@braap.org>

[rth: Move redundant qemu_load out of cmpxchg loop.]

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <1467054136-10430-16-git-send-email-cota@braap.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-i386/translate.c | 38 ++++++++++++++++++++++++++++++++++----
 1 file changed, 34 insertions(+), 4 deletions(-)

diff --git a/target-i386/translate.c b/target-i386/translate.c
index 49455a3..17a37a3 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -4713,11 +4713,41 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
             }
             break;
         case 3: /* neg */
-            tcg_gen_neg_tl(cpu_T0, cpu_T0);
-            if (mod != 3) {
-                gen_op_st_v(s, ot, cpu_T0, cpu_A0);
+            if (s->prefix & PREFIX_LOCK) {
+                TCGLabel *label1;
+                TCGv a0, t0, t1, t2;
+
+                if (mod == 3) {
+                    goto illegal_op;
+                }
+                a0 = tcg_temp_local_new();
+                t0 = tcg_temp_local_new();
+                label1 = gen_new_label();
+
+                tcg_gen_mov_tl(a0, cpu_A0);
+                tcg_gen_mov_tl(t0, cpu_T0);
+
+                gen_set_label(label1);
+                t1 = tcg_temp_new();
+                t2 = tcg_temp_new();
+                tcg_gen_mov_tl(t2, t0);
+                tcg_gen_neg_tl(t1, t0);
+                tcg_gen_atomic_cmpxchg_tl(t0, a0, t0, t1,
+                                          s->mem_index, ot | MO_LE);
+                tcg_temp_free(t1);
+                tcg_gen_brcond_tl(TCG_COND_NE, t0, t2, label1);
+
+                tcg_temp_free(t2);
+                tcg_temp_free(a0);
+                tcg_gen_mov_tl(cpu_T0, t0);
+                tcg_temp_free(t0);
             } else {
-                gen_op_mov_reg_v(ot, rm, cpu_T0);
+                tcg_gen_neg_tl(cpu_T0, cpu_T0);
+                if (mod != 3) {
+                    gen_op_st_v(s, ot, cpu_T0, cpu_A0);
+                } else {
+                    gen_op_mov_reg_v(ot, rm, cpu_T0);
+                }
             }
             gen_op_update_neg_cc();
             set_cc_op(s, CC_OP_SUBB + ot);
-- 
2.7.4

  parent reply	other threads:[~2016-10-09 23:43 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-09 23:41 [Qemu-devel] [PATCH v5 00/35] cmpxchg-based emulation of atomics Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 01/35] atomics: add atomic_xor Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 02/35] atomics: add atomic_op_fetch variants Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 03/35] exec: Avoid direct references to Int128 parts Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 04/35] int128: Use __int128 if available Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 05/35] int128: Add int128_make128 Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 07/35] linux-user: enable parallel code generation on clone Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 08/35] cputlb: Replace SHIFT with DATA_SIZE Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 09/35] cputlb: Move probe_write out of softmmu_template.h Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 10/35] cputlb: Remove includes from softmmu_template.h Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 11/35] cputlb: Move most of iotlb code out of line Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 12/35] cputlb: Tidy some macros Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 13/35] tcg: Add atomic helpers Richard Henderson
2016-10-11  6:47   ` Alex Bennée
2016-10-11 12:00     ` Alex Bennée
2016-10-11 13:48     ` Richard Henderson
2016-10-11 15:21       ` Alex Bennée
2016-10-11 15:39         ` Richard Henderson
2016-10-11 15:55           ` Alex Bennée
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 14/35] tcg: Add atomic128 helpers Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 15/35] tcg: Add CONFIG_ATOMIC64 Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 16/35] tcg: Emit barriers with parallel_cpus Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 17/35] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 18/35] target-i386: emulate LOCK'ed OP instructions using atomic helpers Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 19/35] target-i386: emulate LOCK'ed INC using atomic helper Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 20/35] target-i386: emulate LOCK'ed NOT " Richard Henderson
2016-10-09 23:41 ` Richard Henderson [this message]
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 22/35] target-i386: emulate LOCK'ed XADD " Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 23/35] target-i386: emulate LOCK'ed BTX ops using atomic helpers Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 24/35] target-i386: emulate XCHG using atomic helper Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 25/35] target-i386: remove helper_lock() Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 26/35] tests: add atomic_add-bench Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 27/35] target-arm: Rearrange aa32 load and store functions Richard Henderson
2016-10-09 23:41 ` [Qemu-devel] [PATCH v5 28/35] target-arm: emulate LL/SC using cmpxchg helpers Richard Henderson
2016-10-09 23:42 ` [Qemu-devel] [PATCH v5 29/35] target-arm: emulate SWP with atomic_xchg helper Richard Henderson
2016-10-09 23:42 ` [Qemu-devel] [PATCH v5 30/35] target-arm: emulate aarch64's LL/SC using cmpxchg helpers Richard Henderson
2016-10-09 23:42 ` [Qemu-devel] [PATCH v5 31/35] linux-user: remove handling of ARM's EXCP_STREX Richard Henderson
2016-10-09 23:42 ` [Qemu-devel] [PATCH v5 32/35] linux-user: remove handling of aarch64's EXCP_STREX Richard Henderson
2016-10-09 23:42 ` [Qemu-devel] [PATCH v5 33/35] target-arm: remove EXCP_STREX + cpu_exclusive_{test, info} Richard Henderson
2016-10-09 23:42 ` [Qemu-devel] [PATCH v5 34/35] target-alpha: Introduce MMU_PHYS_IDX Richard Henderson
2016-10-09 23:42 ` [Qemu-devel] [PATCH v5 35/35] target-alpha: Emulate LL/SC using cmpxchg helpers Richard Henderson
2016-10-10 14:27 ` [Qemu-devel] [PATCH v5 06/35][RESEND] tcg: Add EXCP_ATOMIC Richard Henderson
2016-10-10 15:52   ` Alex Bennée
     [not found] ` <1476056526-30740-7-git-send-email-rth@twiddle.net>
2016-10-10 16:17   ` [Qemu-devel] [PATCH v5 06/35] " Alex Bennée

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1476056526-30740-22-git-send-email-rth@twiddle.net \
    --to=rth@twiddle.net \
    --cc=alex.bennee@linaro.org \
    --cc=cota@braap.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).