From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1buBmv-0006GP-HG for qemu-devel@nongnu.org; Wed, 12 Oct 2016 01:09:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1buBms-0001xr-9g for qemu-devel@nongnu.org; Wed, 12 Oct 2016 01:09:09 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:38131) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1buBms-0001xN-0j for qemu-devel@nongnu.org; Wed, 12 Oct 2016 01:09:06 -0400 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u9C53q8S108580 for ; Wed, 12 Oct 2016 01:09:05 -0400 Received: from e28smtp08.in.ibm.com (e28smtp08.in.ibm.com [125.16.236.8]) by mx0a-001b2d01.pphosted.com with ESMTP id 2615bu4ugh-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 12 Oct 2016 01:09:04 -0400 Received: from localhost by e28smtp08.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 12 Oct 2016 10:39:02 +0530 From: Nikunj A Dadhania Date: Wed, 12 Oct 2016 10:38:50 +0530 Message-Id: <1476248933-25562-1-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v1 0/3] POWER9 TCG enablements - part6 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, nikunj@linux.vnet.ibm.com, benh@kernel.crashing.org This series contains 11 new instructions for POWER9 ISA3.0 Vector Extend Sign Vector Integer Negate Vector Byte-Reverse Patches: 01: vextsb2w: Vector Extend Sign Byte To Word vextsh2w: Vector Extend Sign Halfword To Word vextsb2d: Vector Extend Sign Byte To Doubleword vextsh2d: Vector Extend Sign Halfword To Doubleword vextsw2d: Vector Extend Sign Word To Doubleword 02: vnegw: Vector Negate Word vnegd: Vector Negate Doubleword 03: xxbrh: VSX Vector Byte-Reverse Halfword xxbrw: VSX Vector Byte-Reverse Word xxbrd: VSX Vector Byte-Reverse Doubleword xxbrq: VSX Vector Byte-Reverse Quadword Changelog: * Added temporary in xxbrq * Use negate directly in place for computing 2's compliment * Use int8_t instead for char * Dropped "VSX Scalar Compare" as fpu_helper needs change with regard to exception flag handling Nikunj A Dadhania (3): target-ppc: implement vexts[bh]2w and vexts[bhw]2d target-ppc: implement vnegw/d instructions target-ppc: implement xxbr[qdwh] instruction target-ppc/helper.h | 7 ++++ target-ppc/int_helper.c | 27 +++++++++++++ target-ppc/translate.c | 32 +++++++++++++++ target-ppc/translate/vmx-impl.inc.c | 7 ++++ target-ppc/translate/vmx-ops.inc.c | 7 ++++ target-ppc/translate/vsx-impl.inc.c | 77 +++++++++++++++++++++++++++++++++++++ target-ppc/translate/vsx-ops.inc.c | 8 ++++ 7 files changed, 165 insertions(+) -- 2.7.4