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From: Laurent Vivier <lvivier@redhat.com>
To: qemu-devel@nongnu.org
Cc: David Gibson <david@gibson.dropbear.id.au>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Bharata B Rao <bharata@linux.vnet.ibm.com>,
	Markus Armbruster <armbru@redhat.com>,
	Matthew Rosato <mjrosato@linux.vnet.ibm.com>,
	Laurent Vivier <lvivier@redhat.com>,
	qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH v2 05/20] target-arm: move cpu_exec_realize() to realize function
Date: Thu, 13 Oct 2016 18:24:47 +0200	[thread overview]
Message-ID: <1476375902-11715-6-git-send-email-lvivier@redhat.com> (raw)
In-Reply-To: <1476375902-11715-1-git-send-email-lvivier@redhat.com>

Setting of cpu->mp_affinity is moved from arm_cpu_initfn()
to arm_cpu_realizefn() as setting of cpu_index is now done
in cpu_exec_realize().

I've removed the cannot_destroy_with_object_finalize_yet field as
unsafe references have been moved to cpu_exec_realize().
(tested with QOM command provided by commit 4c315c27 with
 "arm1026-arm-cpu")

CC: Peter Maydell <peter.maydell@linaro.org>
CC: qemu-arm@nongnu.org
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
---
 target-arm/cpu.c | 39 +++++++++++++++++----------------------
 1 file changed, 17 insertions(+), 22 deletions(-)

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 7e58134..54e7991 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -441,23 +441,12 @@ static void arm_cpu_initfn(Object *obj)
     CPUState *cs = CPU(obj);
     ARMCPU *cpu = ARM_CPU(obj);
     static bool inited;
-    uint32_t Aff1, Aff0;
 
     cs->env_ptr = &cpu->env;
     cpu_exec_init(cs);
-    cpu_exec_realize(cs, &error_abort);
     cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal,
                                          g_free, g_free);
 
-    /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
-     * We don't support setting cluster ID ([16..23]) (known as Aff2
-     * in later ARM ARM versions), or any of the higher affinity level fields,
-     * so these bits always RAZ.
-     */
-    Aff1 = cs->cpu_index / ARM_CPUS_PER_CLUSTER;
-    Aff0 = cs->cpu_index % ARM_CPUS_PER_CLUSTER;
-    cpu->mp_affinity = (Aff1 << ARM_AFF1_SHIFT) | Aff0;
-
 #ifndef CONFIG_USER_ONLY
     /* Our inbound IRQ and FIQ lines */
     if (kvm_enabled()) {
@@ -577,6 +566,14 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
     ARMCPU *cpu = ARM_CPU(dev);
     ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
     CPUARMState *env = &cpu->env;
+    Error *local_err = NULL;
+    uint32_t Aff1, Aff0;
+
+    cpu_exec_realize(cs, &local_err);
+    if (local_err != NULL) {
+        error_propagate(errp, local_err);
+        return;
+    }
 
     /* Some features automatically imply others: */
     if (arm_feature(env, ARM_FEATURE_V8)) {
@@ -632,6 +629,15 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
         set_feature(env, ARM_FEATURE_THUMB_DSP);
     }
 
+    /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
+     * We don't support setting cluster ID ([16..23]) (known as Aff2
+     * in later ARM ARM versions), or any of the higher affinity level fields,
+     * so these bits always RAZ.
+     */
+    Aff1 = cs->cpu_index / ARM_CPUS_PER_CLUSTER;
+    Aff0 = cs->cpu_index % ARM_CPUS_PER_CLUSTER;
+    cpu->mp_affinity = (Aff1 << ARM_AFF1_SHIFT) | Aff0;
+
     if (cpu->reset_hivecs) {
             cpu->reset_sctlr |= (1 << 13);
     }
@@ -1534,17 +1540,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
     cc->debug_check_watchpoint = arm_debug_check_watchpoint;
 
     cc->disas_set_info = arm_disas_set_info;
-
-    /*
-     * Reason: arm_cpu_initfn() calls cpu_exec_init(), which saves
-     * the object in cpus -> dangling pointer after final
-     * object_unref().
-     *
-     * Once this is fixed, the devices that create ARM CPUs should be
-     * updated not to set cannot_destroy_with_object_finalize_yet,
-     * unless they still screw up something else.
-     */
-    dc->cannot_destroy_with_object_finalize_yet = true;
 }
 
 static void cpu_register(const ARMCPUInfo *info)
-- 
2.7.4

  parent reply	other threads:[~2016-10-13 16:25 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-13 16:24 [Qemu-devel] [PATCH v2 00/20] Split cpu_exec_init() into an init and a realize part Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 01/20] exec: split cpu_exec_init() Laurent Vivier
2016-10-14  4:05   ` David Gibson
2016-10-14  7:56   ` Greg Kurz
2016-10-14 12:13     ` Laurent Vivier
2016-10-14 15:04       ` Greg Kurz
2016-10-14 13:55   ` Igor Mammedov
2016-10-14 13:57     ` Laurent Vivier
2016-10-14 14:11   ` Igor Mammedov
2016-10-14 14:13     ` Laurent Vivier
2016-10-14 14:26       ` Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 02/20] target-i386: move back cpu_exec_init() to init Laurent Vivier
2016-10-14 13:33   ` Eduardo Habkost
2016-10-14 13:34     ` Laurent Vivier
2016-10-14 13:48       ` Eduardo Habkost
2016-10-14 14:12         ` Laurent Vivier
2016-10-14 14:31           ` Eduardo Habkost
2016-10-14 14:33         ` Igor Mammedov
2016-10-14 14:43           ` Eduardo Habkost
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 03/20] target-ppc: " Laurent Vivier
2016-10-14  4:07   ` David Gibson
2016-10-14  7:12     ` Laurent Vivier
2016-10-14 14:49     ` Bharata B Rao
2016-10-14 17:26       ` Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 04/20] target-s390: " Laurent Vivier
2016-10-13 16:24 ` Laurent Vivier [this message]
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 06/20] target-alpha: move cpu_exec_realize() to realize function Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 07/20] target-cris: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 08/20] target-lm32: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 09/20] target-m68k: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 10/20] target-microblaze: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 11/20] target-mips: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 12/20] target-moxie: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 13/20] target-openrisc: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 14/20] target-sh4: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 15/20] target-sparc: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 16/20] target-tilegx: " Laurent Vivier
2016-10-13 16:24 ` [Qemu-devel] [PATCH v2 17/20] target-tricore: " Laurent Vivier
2016-10-13 16:25 ` [Qemu-devel] [PATCH v2 18/20] target-unicore32: " Laurent Vivier
2016-10-13 16:25 ` [Qemu-devel] [PATCH v2 19/20] target-xtensa: " Laurent Vivier
2016-10-13 16:25 ` [Qemu-devel] [PATCH v2 20/20] exec: move cpu_exec_init() to cpu_common_initfn() Laurent Vivier

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