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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Fri, 14 Oct 2016 18:13:36 +1100
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Subject: Re: [Qemu-devel] [PATCH v4 17/20] ppc/pnv: Add cut down PSI bridge
 model and hookup external interrupt
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To: David Gibson <david@gibson.dropbear.id.au>, =?ISO-8859-1?Q?C=E9dric?= Le Goater <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org

On Fri, 2016-10-14 at 17:32 +1100, David Gibson wrote:
> >=C2=A0 static void pnv_lpc_isa_irq_handler_cpld(void *opaque, int n, i=
nt level)
> >=C2=A0 {
> > -=C2=A0=C2=A0=C2=A0 /* We don't yet emulate the PSI bridge which prov=
ides the external
> > -=C2=A0=C2=A0=C2=A0=C2=A0 * interrupt, so just drop interrupts on the=
 floor
> > -=C2=A0=C2=A0=C2=A0=C2=A0 */
> > +=C2=A0=C2=A0=C2=A0 static uint32_t irqstate;
>=20
> Hmm.. static local with important state?=C2=A0 That it's not clear whet=
her
> it should be per-chip or not?
>=20
> I'm not averse to hacks for early bringup, but it should at least have
> a FIXME comment on it.

This emulates the external FPGA no ? There's only ever one ... well I
suppose one could make a machine with more but that hasn't been done
yet.

Ideally it could be a whole device by itself who feeds the ISA irqs and
outputs the final IRQ but that's overkill.

Cheers,
Ben.