From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36318) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bvLxG-0003bd-Ey for qemu-devel@nongnu.org; Sat, 15 Oct 2016 06:12:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bvLxD-0002hP-IV for qemu-devel@nongnu.org; Sat, 15 Oct 2016 06:12:37 -0400 Received: from mail-wm0-x244.google.com ([2a00:1450:400c:c09::244]:33828) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1bvLxD-0002gs-Bl for qemu-devel@nongnu.org; Sat, 15 Oct 2016 06:12:35 -0400 Received: by mail-wm0-x244.google.com with SMTP id z189so1964933wmb.1 for ; Sat, 15 Oct 2016 03:12:35 -0700 (PDT) From: "Aviv B.D" Date: Sat, 15 Oct 2016 13:12:04 +0300 Message-Id: <1476526326-32363-2-git-send-email-bd.aviv@gmail.com> In-Reply-To: <1476526326-32363-1-git-send-email-bd.aviv@gmail.com> References: <1476526326-32363-1-git-send-email-bd.aviv@gmail.com> Subject: [Qemu-devel] [PATCH v4 1/3] IOMMU: add option to enable VTD_CAP_CM to vIOMMU capility exposoed to guest List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Alex Williamson , Peter Xu , Jan Kiszka , Aviv Ben-David From: "Aviv Ben-David" This capability asks the guest to invalidate cache before each map operation. We can use this invalidation to trap map operations in the hypervisor. This capability only enabled when cache-mode property of the device is true. Signed-off-by: Aviv Ben-David --- hw/i386/intel_iommu.c | 5 +++++ hw/i386/intel_iommu_internal.h | 1 + include/hw/i386/intel_iommu.h | 2 ++ 3 files changed, 8 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 2efd69b..6e5ad7b 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2012,6 +2012,7 @@ static const MemoryRegionOps vtd_mem_ops = { static Property vtd_properties[] = { DEFINE_PROP_UINT32("version", IntelIOMMUState, version, 0), + DEFINE_PROP_BOOL("cache-mode", IntelIOMMUState, cache_mode_enabled, FALSE), DEFINE_PROP_END_OF_LIST(), }; @@ -2385,6 +2386,10 @@ static void vtd_init(IntelIOMMUState *s) s->ecap |= VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHMV; } + if (s->cache_mode_enabled){ + s->cap |= VTD_CAP_CM; + } + vtd_reset_context_cache(s); vtd_reset_iotlb(s); diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 0829a50..35d9f3a 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -201,6 +201,7 @@ #define VTD_CAP_MAMV (VTD_MAMV << 48) #define VTD_CAP_PSI (1ULL << 39) #define VTD_CAP_SLLPS ((1ULL << 34) | (1ULL << 35)) +#define VTD_CAP_CM (1ULL << 7) /* Supported Adjusted Guest Address Widths */ #define VTD_CAP_SAGAW_SHIFT 8 diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index a42dbd7..7a94f16 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -258,6 +258,8 @@ struct IntelIOMMUState { uint8_t womask[DMAR_REG_SIZE]; /* WO (write only - read returns 0) */ uint32_t version; + bool cache_mode_enabled; /* RO - is cap CM enabled? */ + dma_addr_t root; /* Current root table pointer */ bool root_extended; /* Type of root table (extended or not) */ bool dmar_enabled; /* Set if DMA remapping is enabled */ -- 1.9.1