From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 10/15] target-alpha: Use deposit and extract ops
Date: Sat, 15 Oct 2016 20:37:45 -0700 [thread overview]
Message-ID: <1476589070-5792-11-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1476589070-5792-1-git-send-email-rth@twiddle.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target-alpha/translate.c | 67 ++++++++++++++++++++++++++++++------------------
1 file changed, 42 insertions(+), 25 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index af717ca..a341729 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -953,7 +953,13 @@ static void gen_ext_h(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
uint8_t lit, uint8_t byte_mask)
{
if (islit) {
- tcg_gen_shli_i64(vc, va, (64 - lit * 8) & 0x3f);
+ int pos = (64 - lit * 8) & 0x3f;
+ int len = cto32(byte_mask) * 8;
+ if (pos < len) {
+ tcg_gen_deposit_i64(vc, load_zero(ctx), va, pos, len - pos);
+ } else {
+ tcg_gen_movi_i64(vc, 0);
+ }
} else {
TCGv tmp = tcg_temp_new();
tcg_gen_shli_i64(tmp, load_gpr(ctx, rb), 3);
@@ -970,38 +976,44 @@ static void gen_ext_l(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
uint8_t lit, uint8_t byte_mask)
{
if (islit) {
- tcg_gen_shri_i64(vc, va, (lit & 7) * 8);
+ int pos = (lit & 7) * 8;
+ int len = cto32(byte_mask) * 8;
+ if (pos + len >= 64) {
+ len = 64 - pos;
+ }
+ tcg_gen_extract_i64(vc, va, pos, len);
} else {
TCGv tmp = tcg_temp_new();
tcg_gen_andi_i64(tmp, load_gpr(ctx, rb), 7);
tcg_gen_shli_i64(tmp, tmp, 3);
tcg_gen_shr_i64(vc, va, tmp);
tcg_temp_free(tmp);
+ gen_zapnoti(vc, vc, byte_mask);
}
- gen_zapnoti(vc, vc, byte_mask);
}
/* INSWH, INSLH, INSQH */
static void gen_ins_h(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
uint8_t lit, uint8_t byte_mask)
{
- TCGv tmp = tcg_temp_new();
-
- /* The instruction description has us left-shift the byte mask and extract
- bits <15:8> and apply that zap at the end. This is equivalent to simply
- performing the zap first and shifting afterward. */
- gen_zapnoti(tmp, va, byte_mask);
-
if (islit) {
- lit &= 7;
- if (unlikely(lit == 0)) {
- tcg_gen_movi_i64(vc, 0);
+ int pos = 64 - (lit & 7) * 8;
+ int len = cto32(byte_mask) * 8;
+ if (pos < len) {
+ tcg_gen_extract_i64(vc, va, pos, len - pos);
} else {
- tcg_gen_shri_i64(vc, tmp, 64 - lit * 8);
+ tcg_gen_movi_i64(vc, 0);
}
} else {
+ TCGv tmp = tcg_temp_new();
TCGv shift = tcg_temp_new();
+ /* The instruction description has us left-shift the byte mask
+ and extract bits <15:8> and apply that zap at the end. This
+ is equivalent to simply performing the zap first and shifting
+ afterward. */
+ gen_zapnoti(tmp, va, byte_mask);
+
/* If (B & 7) == 0, we need to shift by 64 and leave a zero. Do this
portably by splitting the shift into two parts: shift_count-1 and 1.
Arrange for the -1 by using ones-complement instead of
@@ -1014,32 +1026,37 @@ static void gen_ins_h(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
tcg_gen_shr_i64(vc, tmp, shift);
tcg_gen_shri_i64(vc, vc, 1);
tcg_temp_free(shift);
+ tcg_temp_free(tmp);
}
- tcg_temp_free(tmp);
}
/* INSBL, INSWL, INSLL, INSQL */
static void gen_ins_l(DisasContext *ctx, TCGv vc, TCGv va, int rb, bool islit,
uint8_t lit, uint8_t byte_mask)
{
- TCGv tmp = tcg_temp_new();
-
- /* The instruction description has us left-shift the byte mask
- the same number of byte slots as the data and apply the zap
- at the end. This is equivalent to simply performing the zap
- first and shifting afterward. */
- gen_zapnoti(tmp, va, byte_mask);
-
if (islit) {
- tcg_gen_shli_i64(vc, tmp, (lit & 7) * 8);
+ int pos = (lit & 7) * 8;
+ int len = cto32(byte_mask) * 8;
+ if (pos + len > 64) {
+ len = 64 - pos;
+ }
+ tcg_gen_deposit_i64(vc, load_zero(ctx), va, pos, len);
} else {
+ TCGv tmp = tcg_temp_new();
TCGv shift = tcg_temp_new();
+
+ /* The instruction description has us left-shift the byte mask
+ and extract bits <15:8> and apply that zap at the end. This
+ is equivalent to simply performing the zap first and shifting
+ afterward. */
+ gen_zapnoti(tmp, va, byte_mask);
+
tcg_gen_andi_i64(shift, load_gpr(ctx, rb), 7);
tcg_gen_shli_i64(shift, shift, 3);
tcg_gen_shl_i64(vc, tmp, shift);
tcg_temp_free(shift);
+ tcg_temp_free(tmp);
}
- tcg_temp_free(tmp);
}
/* MSKWH, MSKLH, MSKQH */
--
2.7.4
next prev parent reply other threads:[~2016-10-16 3:38 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-16 3:37 [Qemu-devel] [PATCH 00/15] tcg field extract primitives Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 01/15] tcg: Add field extraction primitives Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 02/15] tcg: Minor adjustments to deposit expanders Richard Henderson
2016-10-17 15:23 ` Claudio Fontana
2016-10-16 3:37 ` [Qemu-devel] [PATCH 03/15] tcg/aarch64: Implement field extraction opcodes Richard Henderson
2016-10-17 15:22 ` Claudio Fontana
2016-10-16 3:37 ` [Qemu-devel] [PATCH 04/15] tcg/arm: Move isa detection to tcg-target.h Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 05/15] tcg/arm: Implement field extraction opcodes Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 06/15] tcg/i386: " Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 07/15] tcg/mips: " Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 08/15] tcg/ppc: " Richard Henderson
2016-10-26 1:48 ` David Gibson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 09/15] tcg/s390: " Richard Henderson
2016-10-16 3:37 ` Richard Henderson [this message]
2016-10-16 3:37 ` [Qemu-devel] [PATCH 11/15] target-arm: Use tcg_gen_*extract Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 12/15] target-i386: Use tcg_gen_extract_tl Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 13/15] target-mips: Use tcg_gen_extract_* Richard Henderson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 14/15] target-ppc: " Richard Henderson
2016-10-17 3:38 ` [Qemu-devel] [Qemu-ppc] " David Gibson
2016-10-17 4:35 ` David Gibson
2016-10-26 2:59 ` David Gibson
2016-10-26 15:38 ` Richard Henderson
2016-10-27 2:10 ` David Gibson
2016-10-16 3:37 ` [Qemu-devel] [PATCH 15/15] target-s390: Use tcg_gen_extract_i64 Richard Henderson
2016-10-16 4:09 ` [Qemu-devel] [PATCH 00/15] tcg field extract primitives no-reply
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