From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54782) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bwC4k-0000f1-TP for qemu-devel@nongnu.org; Mon, 17 Oct 2016 13:51:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bwC4j-0002hi-L6 for qemu-devel@nongnu.org; Mon, 17 Oct 2016 13:51:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41064) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bwC4j-0002gZ-E1 for qemu-devel@nongnu.org; Mon, 17 Oct 2016 13:51:49 -0400 From: Eduardo Habkost Date: Mon, 17 Oct 2016 15:51:19 -0200 Message-Id: <1476726698-14661-3-git-send-email-ehabkost@redhat.com> In-Reply-To: <1476726698-14661-1-git-send-email-ehabkost@redhat.com> References: <1476726698-14661-1-git-send-email-ehabkost@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 02/21] target-i386: List CPU models using subclass list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Paolo Bonzini , Richard Henderson , qemu-devel@nongnu.org Instead of using the builtin_x86_defs array, use the QOM subclass list to list CPU models on "-cpu ?" and "query-cpu-definitions". Signed-off-by: Andreas F=C3=A4rber [ehabkost: copied code from a patch by Andreas: "target-i386: QOM'ify CPU", from March 2012] Signed-off-by: Eduardo Habkost --- target-i386/cpu-qom.h | 4 ++ target-i386/cpu.c | 103 ++++++++++++++++++++++++++++++++++++--------= ------ 2 files changed, 78 insertions(+), 29 deletions(-) diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 5dde658..e724004 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -63,6 +63,10 @@ typedef struct X86CPUClass { =20 bool kvm_required; =20 + /* Optional description of CPU model. + * If unavailable, cpu_def->model_id is used */ + const char *model_description; + DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); } X86CPUClass; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 1c57fce..cad2759 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1628,6 +1628,9 @@ static void host_x86_cpu_class_init(ObjectClass *oc= , void *data) cpu_x86_fill_model_id(host_cpudef.model_id); =20 xcc->cpu_def =3D &host_cpudef; + xcc->model_description =3D + "KVM processor with all supported host features " + "(only available in KVM mode)"; =20 /* level, xlevel, xlevel2, and the feature words are initialized on * instance_init, because they require KVM to be initialized. @@ -2098,23 +2101,62 @@ static void listflags(FILE *f, fprintf_function p= rint, const char **featureset) } } =20 -/* generate CPU information. */ +/* Sort alphabetically by type name, listing kvm_required models last. *= / +static gint x86_cpu_list_compare(gconstpointer a, gconstpointer b) +{ + ObjectClass *class_a =3D (ObjectClass *)a; + ObjectClass *class_b =3D (ObjectClass *)b; + X86CPUClass *cc_a =3D X86_CPU_CLASS(class_a); + X86CPUClass *cc_b =3D X86_CPU_CLASS(class_b); + const char *name_a, *name_b; + + if (cc_a->kvm_required !=3D cc_b->kvm_required) { + /* kvm_required items go last */ + return cc_a->kvm_required ? 1 : -1; + } else { + name_a =3D object_class_get_name(class_a); + name_b =3D object_class_get_name(class_b); + return strcmp(name_a, name_b); + } +} + +static GSList *get_sorted_cpu_model_list(void) +{ + GSList *list =3D object_class_get_list(TYPE_X86_CPU, false); + list =3D g_slist_sort(list, x86_cpu_list_compare); + return list; +} + +static void x86_cpu_list_entry(gpointer data, gpointer user_data) +{ + ObjectClass *oc =3D data; + X86CPUClass *cc =3D X86_CPU_CLASS(oc); + CPUListState *s =3D user_data; + char *name =3D x86_cpu_class_get_model_name(cc); + const char *desc =3D cc->model_description; + if (!desc) { + desc =3D cc->cpu_def->model_id; + } + + (*s->cpu_fprintf)(s->file, "x86 %16s %-48s\n", + name, desc); + g_free(name); +} + +/* list available CPU models and flags */ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf) { - X86CPUDefinition *def; - char buf[256]; int i; + CPUListState s =3D { + .file =3D f, + .cpu_fprintf =3D cpu_fprintf, + }; + GSList *list; =20 - for (i =3D 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { - def =3D &builtin_x86_defs[i]; - snprintf(buf, sizeof(buf), "%s", def->name); - (*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id); - } -#ifdef CONFIG_KVM - (*cpu_fprintf)(f, "x86 %16s %-48s\n", "host", - "KVM processor with all supported host features " - "(only available in KVM mode)"); -#endif + (*cpu_fprintf)(f, "Available CPUs:\n"); + list =3D get_sorted_cpu_model_list(); + g_slist_foreach(list, x86_cpu_list_entry, &s); + g_slist_free(list); =20 (*cpu_fprintf)(f, "\nRecognized CPUID flags:\n"); for (i =3D 0; i < ARRAY_SIZE(feature_word_info); i++) { @@ -2126,26 +2168,29 @@ void x86_cpu_list(FILE *f, fprintf_function cpu_f= printf) } } =20 -CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) +static void x86_cpu_definition_entry(gpointer data, gpointer user_data) { - CpuDefinitionInfoList *cpu_list =3D NULL; - X86CPUDefinition *def; - int i; + ObjectClass *oc =3D data; + X86CPUClass *cc =3D X86_CPU_CLASS(oc); + CpuDefinitionInfoList **cpu_list =3D user_data; + CpuDefinitionInfoList *entry; + CpuDefinitionInfo *info; =20 - for (i =3D 0; i < ARRAY_SIZE(builtin_x86_defs); i++) { - CpuDefinitionInfoList *entry; - CpuDefinitionInfo *info; - - def =3D &builtin_x86_defs[i]; - info =3D g_malloc0(sizeof(*info)); - info->name =3D g_strdup(def->name); + info =3D g_malloc0(sizeof(*info)); + info->name =3D x86_cpu_class_get_model_name(cc); =20 - entry =3D g_malloc0(sizeof(*entry)); - entry->value =3D info; - entry->next =3D cpu_list; - cpu_list =3D entry; - } + entry =3D g_malloc0(sizeof(*entry)); + entry->value =3D info; + entry->next =3D *cpu_list; + *cpu_list =3D entry; +} =20 +CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) +{ + CpuDefinitionInfoList *cpu_list =3D NULL; + GSList *list =3D get_sorted_cpu_model_list(); + g_slist_foreach(list, x86_cpu_definition_entry, &cpu_list); + g_slist_free(list); return cpu_list; } =20 --=20 2.7.4