From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38582) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bwCqF-0001G4-SW for qemu-devel@nongnu.org; Mon, 17 Oct 2016 14:40:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bwCqF-00017g-4I for qemu-devel@nongnu.org; Mon, 17 Oct 2016 14:40:55 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:47358) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1bwCqE-000106-Tk for qemu-devel@nongnu.org; Mon, 17 Oct 2016 14:40:55 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1bwCqB-00054v-E6 for qemu-devel@nongnu.org; Mon, 17 Oct 2016 19:40:51 +0100 From: Peter Maydell Date: Mon, 17 Oct 2016 19:40:30 +0100 Message-Id: <1476729644-4595-12-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1476729644-4595-1-git-send-email-peter.maydell@linaro.org> References: <1476729644-4595-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 11/25] hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Thomas Huth The M1 and M2 bits are both used for configuring the endianness of the AHB master interfaces, so the second PL080_CONF_M1 should be PL080_CONF_M2 instead. Buglink: https://bugs.launchpad.net/qemu/+bug/1631773 Signed-off-by: Thomas Huth Message-id: 1476274451-26567-1-git-send-email-thuth@redhat.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/dma/pl080.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c index 3bed5c3..7724c93 100644 --- a/hw/dma/pl080.c +++ b/hw/dma/pl080.c @@ -351,7 +351,7 @@ static void pl080_write(void *opaque, hwaddr offset, break; case 12: /* Configuration */ s->conf = value; - if (s->conf & (PL080_CONF_M1 | PL080_CONF_M1)) { + if (s->conf & (PL080_CONF_M1 | PL080_CONF_M2)) { qemu_log_mask(LOG_UNIMP, "pl080_write: Big-endian DMA not implemented\n"); } -- 2.7.4