From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 04/25] aspeed: rename the smc object to fmc
Date: Mon, 17 Oct 2016 19:40:23 +0100 [thread overview]
Message-ID: <1476729644-4595-5-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1476729644-4595-1-git-send-email-peter.maydell@linaro.org>
From: Cédric Le Goater <clg@kaod.org>
The Aspeed SoC has three different types of SMC (Static Memory
Controller) controllers: the SMC (legacy), the FMC (the new one) and
the SPI for the host PNOR. The FMC and the SPI models are now
converging on the AST2500 SoC and the SMC, which was still available
on the AST2400 SoC, was removed.
The Aspeed SoC does not provide support for the legacy SMC
controller. So, let's rename the 'smc' object to 'fmc' to clarify its
nature.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1474977462-28032-2-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/aspeed.c | 2 +-
hw/arm/aspeed_soc.c | 18 +++++++++---------
include/hw/arm/aspeed_soc.h | 2 +-
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 6b18c7f..4bb33cb 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -128,7 +128,7 @@ static void aspeed_board_init(MachineState *machine,
object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
&error_abort);
- aspeed_board_init_flashes(&bmc->soc.smc, "n25q256a", &error_abort);
+ aspeed_board_init_flashes(&bmc->soc.fmc, "n25q256a", &error_abort);
aspeed_board_init_flashes(&bmc->soc.spi, "mx25l25635e", &error_abort);
aspeed_board_binfo.kernel_filename = machine->kernel_filename;
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index c0a3102..479c0d2 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -100,9 +100,9 @@ static void aspeed_soc_init(Object *obj)
object_property_add_alias(obj, "hw-strap2", OBJECT(&s->scu),
"hw-strap2", &error_abort);
- object_initialize(&s->smc, sizeof(s->smc), "aspeed.smc.fmc");
- object_property_add_child(obj, "smc", OBJECT(&s->smc), NULL);
- qdev_set_parent_bus(DEVICE(&s->smc), sysbus_get_default());
+ object_initialize(&s->fmc, sizeof(s->fmc), "aspeed.smc.fmc");
+ object_property_add_child(obj, "fmc", OBJECT(&s->fmc), NULL);
+ qdev_set_parent_bus(DEVICE(&s->fmc), sysbus_get_default());
object_initialize(&s->spi, sizeof(s->spi), "aspeed.smc.spi");
object_property_add_child(obj, "spi", OBJECT(&s->spi), NULL);
@@ -178,17 +178,17 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0,
qdev_get_gpio_in(DEVICE(&s->vic), 12));
- /* SMC */
- object_property_set_int(OBJECT(&s->smc), 1, "num-cs", &err);
- object_property_set_bool(OBJECT(&s->smc), true, "realized", &local_err);
+ /* FMC */
+ object_property_set_int(OBJECT(&s->fmc), 1, "num-cs", &err);
+ object_property_set_bool(OBJECT(&s->fmc), true, "realized", &local_err);
error_propagate(&err, local_err);
if (err) {
error_propagate(errp, err);
return;
}
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->smc), 0, ASPEED_SOC_FMC_BASE);
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->smc), 1, ASPEED_SOC_FMC_FLASH_BASE);
- sysbus_connect_irq(SYS_BUS_DEVICE(&s->smc), 0,
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, ASPEED_SOC_FMC_BASE);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 1, ASPEED_SOC_FMC_FLASH_BASE);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
qdev_get_gpio_in(DEVICE(&s->vic), 19));
/* SPI */
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 932704c..7359e25 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -31,7 +31,7 @@ typedef struct AspeedSoCState {
AspeedTimerCtrlState timerctrl;
AspeedI2CState i2c;
AspeedSCUState scu;
- AspeedSMCState smc;
+ AspeedSMCState fmc;
AspeedSMCState spi;
AspeedSDMCState sdmc;
} AspeedSoCState;
--
2.7.4
next prev parent reply other threads:[~2016-10-17 18:41 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-17 18:40 [Qemu-devel] [PULL 00/25] target-arm queue Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 01/25] docs/generic-loader: Update the document Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 02/25] Reducing stack frame size in stream_process_mem2s() Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 03/25] target-arm: kvm: use AddressSpace-specific listener Peter Maydell
2016-10-17 18:40 ` Peter Maydell [this message]
2016-10-17 18:40 ` [Qemu-devel] [PULL 05/25] aspeed: move the flash module mapping address under the controller definition Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 06/25] aspeed: extend the number of host SPI controllers Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 07/25] aspeed: add support for the AST2500 SoC SMC controllers Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 08/25] aspeed: create mapping regions for the maximum number of slaves Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 09/25] aspeed: add support for the SMC segment registers Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 10/25] hw/arm/boot: allow using a command line specified dtb without a kernel Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 11/25] hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1) Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 12/25] hw/intc/arm_gic_kvm: Fix build on aarch64 Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 13/25] hw/arm/virt-acpi-build: fix MADT generation Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 14/25] hw/arm/virt: no ITS on older machine types Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 15/25] tests: add a m25p80 test Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 16/25] tests: cleanup ptimer-test Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 17/25] pxa2xx: Auto-assign name for i2c bus in i2c_init_bus Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 18/25] target-arm: Infrastucture changes to enable handling of tagged address loading into PC Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 19/25] target-arm: Code changes to implement overwrite of tag field on PC load Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 20/25] target-arm: Comments added to identify cases in a switch Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 21/25] Fix masking of PC lower bits when doing exception returns Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 22/25] target-arm: Implement dummy MDCCINT_EL1 Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 23/25] target-arm: Add trace events for the generic timers Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 24/25] hw/intc/arm_gicv3: Fix ICC register tracepoints Peter Maydell
2016-10-17 18:40 ` [Qemu-devel] [PULL 25/25] hw/char/pl011: Add trace events Peter Maydell
2016-10-18 8:25 ` [Qemu-devel] [PULL 00/25] target-arm queue Peter Maydell
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