From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40111) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1byjEH-0002XF-98 for qemu-devel@nongnu.org; Mon, 24 Oct 2016 13:40:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1byjEG-0005WI-Ix for qemu-devel@nongnu.org; Mon, 24 Oct 2016 13:40:09 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:32972) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1byjEG-0005Ty-Ag for qemu-devel@nongnu.org; Mon, 24 Oct 2016 13:40:08 -0400 Received: by mail-pf0-x242.google.com with SMTP id i85so17125291pfa.0 for ; Mon, 24 Oct 2016 10:40:08 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 24 Oct 2016 10:39:33 -0700 Message-Id: <1477330788-14996-23-git-send-email-rth@twiddle.net> In-Reply-To: <1477330788-14996-1-git-send-email-rth@twiddle.net> References: <1477330788-14996-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v8 22/37] target-i386: emulate LOCK'ed NOT using atomic helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, cota@braap.org, alex.bennee@linaro.org From: "Emilio G. Cota" [rth: Avoid qemu_load that's redundant with the atomic op.] Signed-off-by: Emilio G. Cota Message-Id: <1467054136-10430-15-git-send-email-cota@braap.org> Signed-off-by: Richard Henderson --- target-i386/translate.c | 26 ++++++++++++++++++++------ 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 2f39dac..6d71564 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -4674,10 +4674,15 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, rm = (modrm & 7) | REX_B(s); op = (modrm >> 3) & 7; if (mod != 3) { - if (op == 0) + if (op == 0) { s->rip_offset = insn_const_size(ot); + } gen_lea_modrm(env, s, modrm); - gen_op_ld_v(s, ot, cpu_T0, cpu_A0); + /* For those below that handle locked memory, don't load here. */ + if (!(s->prefix & PREFIX_LOCK) + || op != 2) { + gen_op_ld_v(s, ot, cpu_T0, cpu_A0); + } } else { gen_op_mov_v_reg(ot, cpu_T0, rm); } @@ -4690,11 +4695,20 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, set_cc_op(s, CC_OP_LOGICB + ot); break; case 2: /* not */ - tcg_gen_not_tl(cpu_T0, cpu_T0); - if (mod != 3) { - gen_op_st_v(s, ot, cpu_T0, cpu_A0); + if (s->prefix & PREFIX_LOCK) { + if (mod == 3) { + goto illegal_op; + } + tcg_gen_movi_tl(cpu_T0, ~0); + tcg_gen_atomic_xor_fetch_tl(cpu_T0, cpu_A0, cpu_T0, + s->mem_index, ot | MO_LE); } else { - gen_op_mov_reg_v(ot, rm, cpu_T0); + tcg_gen_not_tl(cpu_T0, cpu_T0); + if (mod != 3) { + gen_op_st_v(s, ot, cpu_T0, cpu_A0); + } else { + gen_op_mov_reg_v(ot, rm, cpu_T0); + } } break; case 3: /* neg */ -- 2.7.4