From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37440) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1byr66-0003Eh-74 for qemu-devel@nongnu.org; Mon, 24 Oct 2016 22:04:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1byr63-0007MQ-44 for qemu-devel@nongnu.org; Mon, 24 Oct 2016 22:04:14 -0400 Received: from bh-25.webhostbox.net ([208.91.199.152]:60109) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1byr62-0006wF-Ri for qemu-devel@nongnu.org; Mon, 24 Oct 2016 22:04:11 -0400 From: Guenter Roeck Date: Mon, 24 Oct 2016 19:03:25 -0700 Message-Id: <1477361005-18646-1-git-send-email-linux@roeck-us.net> Subject: [Qemu-devel] [PATCH] i.MX: Fix GPIO ISR register write List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Jean-Christophe Dubois , Peter Crosthwaite , Peter Maydell , Guenter Roeck Writing the ISR register is supposed to clear interrupt status bits, not to set them. This patch makes '-M sabrelite' work without devicetree changes (Linux kernel versions 3.18 to 4.7 with imx_v6_v7_defconfig and up to v4.8 with multi_v7_defconfig; mainline has different problems). Signed-off-by: Guenter Roeck --- hw/gpio/imx_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c index f3574aa..c36c394 100644 --- a/hw/gpio/imx_gpio.c +++ b/hw/gpio/imx_gpio.c @@ -237,7 +237,7 @@ static void imx_gpio_write(void *opaque, hwaddr offset, uint64_t value, break; case ISR_ADDR: - s->isr |= ~value; + s->isr &= ~value; imx_gpio_set_all_int_lines(s); break; -- 2.5.0