From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60216) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bz33m-0008QN-VC for qemu-devel@nongnu.org; Tue, 25 Oct 2016 10:50:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bz33i-0005uR-2F for qemu-devel@nongnu.org; Tue, 25 Oct 2016 10:50:39 -0400 Received: from mout.kundenserver.de ([212.227.126.131]:49578) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bz33h-0005ts-PV for qemu-devel@nongnu.org; Tue, 25 Oct 2016 10:50:34 -0400 From: Laurent Vivier Date: Tue, 25 Oct 2016 16:49:58 +0200 Message-Id: <1477407021-30755-1-git-send-email-laurent@vivier.eu> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH 00/23] target-m68k: prepare to introduce 680x0 instruction set List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: schwab@linux-m68k.org, agraf@suse.de, Richard Henderson , gerg@uclinux.org, Laurent Vivier As I'm not able to manage too large series, this series is a subset of the series I sent in May: https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg00501.html It doesn't introduce any new instructions but: - introduce the new processors feature flags - introduce new flags management as proposed by Richard I've checked it doesn't break coldfire support: http://wiki.qemu.org/download/coldfire-test-0.1.tar.bz2 but it can't boot a 680x0 processor kernel. I've fixed some style issues reported by checkpatch.pl and merged some of the patches cleaning up flags (as suggested by Richard). John Paul Adrian Glaubitz (1): target-m68k: Build the opcode table only once to avoid multithreading issues Laurent Vivier (13): target-m68k: fix DEBUG_DISPATCH target-m68k: define m680x0 CPUs and features target-m68k: manage scaled index target-m68k: introduce read_imXX() functions target-m68k: set disassembler mode to 680x0 or coldfire target-m68k: define operand sizes target-m68k: set PAGE_BITS to 12 for m68k target-m68k: REG() macro cleanup target-m68k: allow to update flags with operation on words and bytes target-m68k: remove m68k_cpu_exec_enter() and m68k_cpu_exec_exit() target-m68k: update move to/from ccr/sr target-m68k: don't update cc_dest in helpers target-m68k: update CPU flags management Richard Henderson (9): target-m68k: Replace helper_xflag_lt with setcond target-m68k: Print flags properly target-m68k: Some fixes to SR and flags management target-m68k: Remove incorrect clearing of cc_x target-m68k: Reorg flags handling target-m68k: Introduce DisasCompare target-m68k: Use setcond for scc target-m68k: Optimize some comparisons target-m68k: Optimize gen_flush_flags cpu-exec.c | 6 - target-m68k/cpu.c | 67 +++- target-m68k/cpu.h | 72 +++- target-m68k/helper.c | 319 +++++++-------- target-m68k/helper.h | 5 +- target-m68k/op_helper.c | 35 +- target-m68k/qregs.def | 6 +- target-m68k/translate.c | 1027 ++++++++++++++++++++++++++++------------------- 8 files changed, 880 insertions(+), 657 deletions(-) -- 2.7.4