From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46525) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bz70m-0005xB-2G for qemu-devel@nongnu.org; Tue, 25 Oct 2016 15:03:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bz70i-0007qJ-TM for qemu-devel@nongnu.org; Tue, 25 Oct 2016 15:03:48 -0400 Received: from mout.kundenserver.de ([217.72.192.75]:50569) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bz70i-0007pG-Je for qemu-devel@nongnu.org; Tue, 25 Oct 2016 15:03:44 -0400 From: Laurent Vivier Date: Tue, 25 Oct 2016 21:03:17 +0200 Message-Id: <1477422199-11208-22-git-send-email-laurent@vivier.eu> In-Reply-To: <1477422199-11208-1-git-send-email-laurent@vivier.eu> References: <1477422199-11208-1-git-send-email-laurent@vivier.eu> Subject: [Qemu-devel] [PULL 21/23] target-m68k: Use setcond for scc List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: schwab@linux-m68k.org, agraf@suse.de, Richard Henderson , gerg@uclinux.org, Laurent Vivier From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 4a650e1..5cc5e14 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -865,19 +865,21 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1) DISAS_INSN(scc) { - TCGLabel *l1; + DisasCompare c; int cond; - TCGv reg; + TCGv reg, tmp; - l1 = gen_new_label(); cond = (insn >> 8) & 0xf; + gen_cc_cond(&c, s, cond); + + tmp = tcg_temp_new(); + tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); + free_cond(&c); + reg = DREG(insn, 0); - tcg_gen_andi_i32(reg, reg, 0xffffff00); - /* This is safe because we modify the reg directly, with no other values - live. */ - gen_jmpcc(s, cond ^ 1, l1); - tcg_gen_ori_i32(reg, reg, 0xff); - gen_set_label(l1); + tcg_gen_neg_i32(tmp, tmp); + tcg_gen_deposit_i32(reg, reg, tmp, 0, 8); + tcg_temp_free(tmp); } /* Force a TB lookup after an instruction that changes the CPU state. */ -- 2.7.4