From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41739) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzMcV-0007HE-5b for qemu-devel@nongnu.org; Wed, 26 Oct 2016 07:43:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzMcT-0004Xk-Ml for qemu-devel@nongnu.org; Wed, 26 Oct 2016 07:43:47 -0400 From: David Gibson Date: Wed, 26 Oct 2016 22:42:18 +1100 Message-Id: <1477482173-8761-15-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1477482173-8761-1-git-send-email-david@gibson.dropbear.id.au> References: <1477482173-8761-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PULL 14/49] target-ppc: implement vnegw/d instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: agraf@suse.de, clg@kaod.org, thuth@redhat.com, lvivier@redhat.com, aik@ozlabs.ru, mark.cave-ayland@ilande.co.uk, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Nikunj A Dadhania , David Gibson From: Nikunj A Dadhania Vector Integer Negate Instructions: vnegw: Vector Negate Word vnegd: Vector Negate Doubleword Signed-off-by: Nikunj A Dadhania Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Signed-off-by: David Gibson --- target-ppc/helper.h | 2 ++ target-ppc/int_helper.c | 12 ++++++++++++ target-ppc/translate/vmx-impl.inc.c | 2 ++ target-ppc/translate/vmx-ops.inc.c | 2 ++ 4 files changed, 18 insertions(+) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 04c6421..5fcc546 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -272,6 +272,8 @@ DEF_HELPER_2(vextsh2w, void, avr, avr) DEF_HELPER_2(vextsb2d, void, avr, avr) DEF_HELPER_2(vextsh2d, void, avr, avr) DEF_HELPER_2(vextsw2d, void, avr, avr) +DEF_HELPER_2(vnegw, void, avr, avr) +DEF_HELPER_2(vnegd, void, avr, avr) DEF_HELPER_2(vupkhpx, void, avr, avr) DEF_HELPER_2(vupklpx, void, avr, avr) DEF_HELPER_2(vupkhsb, void, avr, avr) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 5aee0a8..dca4798 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -1949,6 +1949,18 @@ VEXT_SIGNED(vextsh2d, s64, UINT16_MAX, int16_t, int64_t) VEXT_SIGNED(vextsw2d, s64, UINT32_MAX, int32_t, int64_t) #undef VEXT_SIGNED +#define VNEG(name, element) \ +void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \ +{ \ + int i; \ + VECTOR_FOR_INORDER_I(i, element) { \ + r->element[i] = -b->element[i]; \ + } \ +} +VNEG(vnegw, s32) +VNEG(vnegd, s64) +#undef VNEG + #define VSPLTI(suffix, element, splat_type) \ void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \ { \ diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c index c8998f3..563f101 100644 --- a/target-ppc/translate/vmx-impl.inc.c +++ b/target-ppc/translate/vmx-impl.inc.c @@ -815,6 +815,8 @@ GEN_VXFORM_NOA(vclzb, 1, 28) GEN_VXFORM_NOA(vclzh, 1, 29) GEN_VXFORM_NOA(vclzw, 1, 30) GEN_VXFORM_NOA(vclzd, 1, 31) +GEN_VXFORM_NOA_2(vnegw, 1, 24, 6) +GEN_VXFORM_NOA_2(vnegd, 1, 24, 7) GEN_VXFORM_NOA_2(vextsb2w, 1, 24, 16) GEN_VXFORM_NOA_2(vextsh2w, 1, 24, 17) GEN_VXFORM_NOA_2(vextsb2d, 1, 24, 24) diff --git a/target-ppc/translate/vmx-ops.inc.c b/target-ppc/translate/vmx-ops.inc.c index 68cba3e..ab64ab2 100644 --- a/target-ppc/translate/vmx-ops.inc.c +++ b/target-ppc/translate/vmx-ops.inc.c @@ -215,6 +215,8 @@ GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 0x00000000, 0x100000, GEN_VXFORM_DUAL_INV(vspltisw, vinsertw, 6, 14, 0x00000000, 0x100000, PPC_ALTIVEC), GEN_VXFORM_300_EXT(vinsertd, 6, 15, 0x100000), +GEN_VXFORM_300_EO(vnegw, 0x01, 0x18, 0x06), +GEN_VXFORM_300_EO(vnegd, 0x01, 0x18, 0x07), GEN_VXFORM_300_EO(vextsb2w, 0x01, 0x18, 0x10), GEN_VXFORM_300_EO(vextsh2w, 0x01, 0x18, 0x11), GEN_VXFORM_300_EO(vextsb2d, 0x01, 0x18, 0x18), -- 2.7.4