From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41515) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzMc0-0006qI-Mp for qemu-devel@nongnu.org; Wed, 26 Oct 2016 07:43:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzMbz-0004Jl-R9 for qemu-devel@nongnu.org; Wed, 26 Oct 2016 07:43:16 -0400 From: David Gibson Date: Wed, 26 Oct 2016 22:42:23 +1100 Message-Id: <1477482173-8761-20-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1477482173-8761-1-git-send-email-david@gibson.dropbear.id.au> References: <1477482173-8761-1-git-send-email-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 19/49] ppc: fix MSR_ME handling for system reset interrupt List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: agraf@suse.de, clg@kaod.org, thuth@redhat.com, lvivier@redhat.com, aik@ozlabs.ru, mark.cave-ayland@ilande.co.uk, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Nicholas Piggin , David Gibson From: Nicholas Piggin Power ISA specifies ME bit handling for system reset interrupt: if the interrupt occurred while the thread was in power-saving mode, set to 1; otherwise not altered Power ISA 3.0, section 6.5 "Interrupt Definitions", Figure 64. Signed-off-by: Nicholas Piggin Reviewed-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: David Gibson --- target-ppc/excp_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 921c39d..53c4075 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -385,11 +385,11 @@ static inline void powerpc_excp(PowerPCCPU *cpu, in= t excp_model, int excp) srr1 =3D SPR_BOOKE_CSRR1; break; case POWERPC_EXCP_RESET: /* System reset exception = */ + /* A power-saving exception sets ME, otherwise it is unchanged *= / if (msr_pow) { /* indicate that we resumed from power save mode */ msr |=3D 0x10000; - } else { - new_msr &=3D ~((target_ulong)1 << MSR_ME); + new_msr |=3D ((target_ulong)1 << MSR_ME); } =20 new_msr |=3D (target_ulong)MSR_HVB; --=20 2.7.4